1
\$\begingroup\$

While I was reading through the MSP430's User's guide, I came to know that its stack pointer is alligned to even address. (Read Pg.189 of http://www.ti.com/lit/ug/slau208m/slau208m.pdf)

Why is it so ? Why is the stack pointer alligned to even address?

As per my understanding, each address location in RAM can store 16bits of data irrespective of even or off address location.

From the below image it is clear how that data can be pushed or popped in RAM.

Now it is like each address(even or odd) can store 8 bits of data. But I expected each address can store 16bits of data.

MSP430 stack operation

\$\endgroup\$
3
\$\begingroup\$

Each memory address references a single byte, but the internal data bus (and flash memory) of the processor is 16 bits wide. When accessing values in memory that will be used for data, this is irrelevant from a hardware perspective; it's something the compiler will deal with. When accessing values in memory that will be executed, i.e. are machine code instructions, the processor has to make sure that the instructions are always aligned to an even-numbered byte address. It does this by enforcing a constraint on the PC (Program Counter) register that it must always be even (bit 0 of the PC probably isn't actually implemented as a DFF at all, just hardwired to logic 0). Instructions have to be on even byte addresses because the processor has to be able to read the entire instruction in a single operation from a single 16-bit wide memory location. If the instruction was on an odd byte address, it would be half in one memory location and half in another. The processor would need to be considerably more complex to deal with that possibility; it's simpler (and, ultimately, cheaper) for the processor designer/manufacturer to accept the tradeoff of less complexity in exchange for the processor only being able to deal with even addresses for instructions.

\$\endgroup\$
4
\$\begingroup\$

The msp430 is natively 16 bit. It has a 16 bit, 2 byte bus. Memory addresses are still numbered in 8 bit, 1 byte increments, as this is the standard for memory addressing.

This is why the stack is evenly aligned.

\$\endgroup\$
  • \$\begingroup\$ Is this the same case for 32 bit ARM controllers ? \$\endgroup\$ – robomon Mar 10 '14 at 17:17
  • \$\begingroup\$ @robomon it depends on how the manufacturer defines "32 bit ARM controller". Look at the literature for the bus size and memory accessing. \$\endgroup\$ – Passerby Mar 11 '14 at 17:53
3
\$\begingroup\$

As per my understanding, each address location in RAM can store 16bits of data

No, each RAM address stores 8 Bits of data, or one Byte.

\$\endgroup\$
  • \$\begingroup\$ Are there any technical reasons why it is alligned to even address ? \$\endgroup\$ – robomon Mar 10 '14 at 7:34
  • \$\begingroup\$ Because each stack transaction (pop or push) transfers 2 bytes, and 2 is an even number. \$\endgroup\$ – Brian Drummond Mar 10 '14 at 9:44

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.