In some ADC/DAC devices their are options to output/input the data in 2's Complement form.

What are advantages of representing digital data in Two's Complement form When you can simply have straight binary code and save time of conversion?

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    \$\begingroup\$ Two's compliment is a straight binary code... \$\endgroup\$ Mar 12, 2014 at 23:41
  • \$\begingroup\$ "Algebra is run on a machine (the universe) that is two's-complement" - HAKMEM 154 (inwap.com/pdp10/hbaker/hakmem/hacks.html) \$\endgroup\$ Mar 13, 2014 at 1:41
  • 3
    \$\begingroup\$ What is 5 in two's complement? 101. What is 5 in straight binary code? 101. What is -5 in two's complement? 1...11111011. What is -5 in straight binary code? Uhh... \$\endgroup\$
    – user253751
    Mar 13, 2014 at 10:15
  • \$\begingroup\$ It seems like a rare special case to have an ADC with negative output? What does that even mean, that the measured voltage is lower than the voltage low reference? And just how would you build such an ADC? Successive approximation with caps that have a negative load...? \$\endgroup\$
    – Lundin
    Sep 26, 2017 at 10:56
  • \$\begingroup\$ Note that there are two different words, complEment and complIment. The subject here is two's complEment, even if those twos are very polite and often say nice things about you. \$\endgroup\$ Sep 26, 2017 at 12:28

6 Answers 6


Two's compliment representation of signed integers is easy to manipulate in hardware. For example, negation (i.e. x = -x) can be performed simply by flipping all the bits in the number and adding one. Performing the same operation in raw binary (e.g. with a sign bit) usually involves a lot more work, because you must treat certain bits in the stream as special. Same goes for addition - the add operation for negative numbers is identical to the add operation for positive numbers, so no additional logic (no pun intended) is required to handle the negative case.

While this doesn't mean it's easier from your perspective, as a consumer of this data, it does lessen the design effort and complexity of the device, thus presumably making it cheaper.

  • 1
    \$\begingroup\$ Flipping bits then adding 1 to negate, no?? \$\endgroup\$ Mar 12, 2014 at 11:15
  • 2
    \$\begingroup\$ @ScottSeidman Yes, sorry, I forgot that bit. Edited to fix :) \$\endgroup\$
    – Polynomial
    Mar 12, 2014 at 11:16
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    \$\begingroup\$ Actually, for maximum pickiness, depending on the processor it may be a single cycle to take x = x * -1, or x = 0 - x, versus at least two cycles for x = ~x + 1 \$\endgroup\$
    – markt
    Mar 12, 2014 at 12:05
  • \$\begingroup\$ @markt Yes, but if you're only implementing a minimal device (i.e. not a full processor) then it makes sense to cut the complexity of the silicon down to a bare minimum. \$\endgroup\$
    – Polynomial
    Mar 12, 2014 at 12:07
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    \$\begingroup\$ +1 Also, Two's complement only has a single value for 0. Others (such as one's complement or sign bit) end up having two \$\endgroup\$
    – sbell
    Mar 12, 2014 at 12:36

The ADC can convert data (say input voltages between 0 and 5V) and you either need that data to be unsigned (0V=0, 5V=max code) or signed (2.5V=0, 0V=max -ve, 5V=max +ve).

In addition to 2's complement being the commonest computer representation for signed data, the conversion between the two formats described above is completely trivial : simply invert the MSB!

This is incredibly cheap to add to the ADC's internal logic and gives the ADC another selling point on the datasheet...

  • \$\begingroup\$ Just added the MSB switch between two's complement and offset binary as a comment below \$\endgroup\$ Mar 12, 2014 at 13:02

If you need to perform math on the representations of negative numbers, twos complement makes that easier than offset binary, which will match with the "signed int" data type. Your compiler will simply know how to deal with it. Otherwise, you spend clock ticks converting back and forth.


In the question, it seems to be implied that it takes longer for the ADC to return the value in 2's complement form than in straight binary. While this might be the case in some particular implementation of an ADC, it's not true in general (for example the MSP430 series of micro-controllers have an ADC peripheral on-chip which will report the value in straight binary or 2's complement, but it takes the same number of cycles in both cases).

With that out of the way, the choice between 2's complement and straight binary mostly comes down to how your transducers work and how you like to process your data.

In straight binary mode, the ADC is giving you a number which represents the ratio between the magnitude of the analog quantity measured (virtually always voltage) and the full-scale reference quantity. For example, a 10-bit ADC can return values from 0 to 1023 (inclusive). If you measure a voltage (say, 1.25 Volts) which is half of the ADC's reference voltage (say, 2.50 Volts), the binary code you read will be half of the maximum value you could read--so, 512, or thereabouts, subject to rounding and non-linearities in the ADC.

For example, let's say you have a transducer which reports the amount of rocket fuel in a tank. 0V means the tank is empty and 2.5V Volts means it's full. So you just connect the transducer to your ADC, and away you go!

But notice that in the above paragraph, there's no way to measure negative voltages. What if we wanted to measure the flow of rocket fuel in and out of the tank (and we had a transducer to do so)? The ADC can't measure negative numbers, so we have a problem. However, there's an easy way to fake it using 2's complement mode: In this case, the transducer output is re-biased so that the zero point is halfway between the ADC's two reference voltages. In other words, positive flows are represented by voltages between 1.25V and 2.50V, and negative flows are represented by 1.25V to 0V--so flows into the tank will give ADC codes of 512 to 1023 and flows out of the thank will give codes of 511 to 0 (in straight binary format).

Now that's awfully inconvenient. We have to subtract 512 from each measurement before doing anything with it, which gives numbers in the range -512 to +511. The point of 2's complement mode is that it does this for you!

However, you still might want to use straight binary with a transducer that produces signed results. For example, your transducer might have differential outputs: In this case you'd want to subtract the inverted output from the non-inverted output anyway, so there's no advantage to using 2's complement.


The two's complement system is in use, because it stems from how simple hardware naturally operates. Think for example you car's odometer, which you have resetted to zero. Then put the gear on reverse, and drive backwards for 1 mile (Please don't do this in reality). Your odometer (if it's mechanical) will roll from 0000 to 9999. The two's complement system behaves similarly.

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Please note that I'm not really offering any new information here, just the odometer example which someone might find helpful - it helped me to understand the rationale of two's complement system when I was young. After that, it was easy for me to intuitively accept that adders, subtractors etc work well with the two's complement system.

And yes, my Nissan's odometer does work this way.

  • \$\begingroup\$ Your answer is about overflow (and underflow), but since the odometer doesn't display negative numbers, it doesn't address anything two's complement-related... \$\endgroup\$
    – marcelm
    Sep 26, 2017 at 10:48
  • \$\begingroup\$ @marcelm, Actually, the odometer example does explain twos complement. It's just that PkP did not go far enough with the explanation. If a six-digit odometer reads zero, and you drive in reverse for one mile, then you would expect it to read -1. Instead, it reads 999999. That's because 999999 is the six-digit, tens complement representation of -1. \$\endgroup\$ Sep 26, 2017 at 12:21
  • \$\begingroup\$ @jameslarge No, it still doesn't. There is nothing in the answer that actually touches two's complement. Or one's complement, or sign-magnitude, or any signed number representation. \$\endgroup\$
    – marcelm
    Sep 26, 2017 at 14:09
  • \$\begingroup\$ @marcelm Yes there is: the very core idea of the two's complement system: that zero minus one equals the maximum representable unsigned integer. That's the idea of two's complement system. No other signed number representation offers this (to my knowledge). And the odometer example shows how naturallly this behavioral property comes from the simplicity of engineering; in the case of the odometer: from mechanical engineering. In both mechanical and electronic world, it (the two's complement system) is the simplest way to make it work. \$\endgroup\$
    – PkP
    Oct 1, 2017 at 9:14

Others have already answered why twos compliment binary is convenient for computer hardware. However, you seem to be asking why a A/D would output twos compliment instead of "straight binary" (whatever you think that really means).

Most A/Ds do output a simple unsigned binary value ranging from 0 to 2N-1, where N is the number of bits the A/D converts to. Note that this could also be considered twos compliment notation, just that the values never happen to be negative. If you are only dealing with positive numbers, then most binary representations are the same. This includes twos compliment and sign magnitude.

Some A/Ds, particularly those built into microcontrollers, have the option of producing negative values for the lower half of their range. This can be a perceived advantage when measuring a bipolar signal.

At least in a microcontroller, this is generally silly. In some cases you might use the A/D values directly without any conversion. In that case, you have already converted all the other values to the A/D range. Restricting that to all non-negative numbers actually simplifies things.

Otherwise, you are going to apply some scaling and offset to the A/D readings anyway to get them into whatever units you use for values internally. Here again there is no downside to unsigned values coming directly out of the A/D. In fact, I usually apply some low pass filtering on the raw values before any scaling and offset. Knowing those values will never be negative simplifies the computations slightly. Doing the scaling on unsigned values also makes things a little simpler sometimes.

I can't remember a single case in well over 100 microcontroller projects where I used the A/D in anything but unsigned output format.

So to answer the question of what the advantages are of a A/D outputting "twos compliment", there are two answers:

  1. They all do anyway, just that most of the time these values are non-negative, so you can't tell the difference between twos compliment and other notations, like sign magnitude.

  2. The advantages are very slight. Inside a microcontroller they are essentially non-existent.

    In dedicated hardware, there can be some advantage to have negative values indicating negative input voltage, in which case twos compliment is the easiest way to deal with the range of values. Note that if the input voltage range isn't symmetric about 0, then this advantage goes away.


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