# Constraining a 7 segment display in VHDL

Right now I'm just trying to configure a single digit 7 segment display, and I'm pretty stuck.

All of the resources I can find say to use a 7 bit logic vector and just stop there. So I understand how it works, the logic vector turns on (or in my case off, since the Nexys 3 apparently turns them off on logic high and on with logic low) with the position in the vector corresponding to a specific segment.

What I do not understand is how to constrain this 7 bit vector to the series of pins. I know the basics of how constraints work (I would just put "LED" in the constraints file in the NET line in the UCF and this would turn it on when LED = 1 in the code) but I'm lost as to how to go about doing that.

An example constraint would be

inst "led0" LOC=A1;


You have to lock down each of the 7 bits separately.

p.s. This is vendor-specific. It isn't part of VHDL.

More detail on UCF files: http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/cgd.pdf

• I know how to constraint a single pin ie NET "seg6" LOC = "L14" | IOSTANDARD = "LVCMOS33"; I was wondering about constraining a logic vector to a multiple pins, since that seems to be what all the examples and tutorials I'm finding are trying to do. – user9892 Mar 13 '14 at 1:30

You need to allocate each pin of the vector individually. To do that, start with a sample UCF file, perhaps auto-generated by the constraint editor tools, to get the syntax right.

Looking at one sample UCF file I have on this computer, the constraints for a vector port

   GPIO_Led : OUT std_logic_vector (3 DOWNTO 0);


look like:

NET  "GPIO_Led<0>"           LOC="H18";
NET  "GPIO_Led<1>"           LOC="L18";
NET  "GPIO_Led<2>"           LOC="G15";
NET  "GPIO_Led<3>"           LOC="G16";

• Ah, okay. I had thought of that but the impression I was given was that the solution would be a bit more simple. Thanks. Though I worry that might be a little clunky when it comes time to multiplex two digit displays together – user9892 Mar 13 '14 at 16:56