I work in MAGIC Integrated Circuit software at layout-level.
I got an 8bit dynamic register made of 1bit dynamic flipflops that write input on the positive edge of the signal:
(Note: I used Transmission gates as switches instead of just NMOS, for robustness. Inverters are normal CMOS inverters.)
So it basically has 8 of these flipflops, connected to the same CLK. However, when I just do simple CLK and notCLK propagation, my register works on BOTH the positive and negative edge of CLK, while it should work only on positive edge. My TA told me it's because of the Race Hazard, where at one point both CLK and notCLK are at high logical level, during transition. This was correct when I simulated, so I eliminated Race Hazard with this circuit:
And indeed, with this there was no overlapping of logical '1' for CLK and notCLK. Of course, there was overlapping of the '0's, but that's inevitable, and it shouldn't affect the circuit, right?
However, I still have the 8bit register writing input values at BOTH positive and negative CLK edges! Why does this still happen? It works correctly apart from this fact. Here's the signal diagram:
As you can see, t2clk and t2nclk are my CLK and notCLK outputs of the race eliminator circuit, and it successfully eliminated '1' overlapping. However, it still writes values on negative edge of signals!
Heres my layout of the whole 8bit register, if its of any use:
If you need detailed layouts, I'll give, but I can guarantee they are faithful to my explanations! :) Help ASAP plz, deadline tomorrow!!! :)
EDIT: Could the addition of Transmission gates instead of NMOS' be the reason for malfunction?