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Background: I am preparing for a full-time employment starting in May. I am coming from a computer engineering background so I only have some working knowledge regarding EE. The job duty is Firmware Engineer - I will be mostly dealing with writing firmware on a micro-controller for a switching-mode power supply board.

My question is: in digital power electronic, how does the PWM generated by the MCU get translated into a output voltage? By looking at the image below, I understand how the transformer, rectifier, and filter works. What I want to know is: what's going on with the waveform between the regulator and the load such that the output voltage becomes so smooth without noise, i.e. how the input waveform of the regulator get transformed into a straight line. Please explain in detail how the PWM, MOSFET, output Inductor, and output Capacitor are involved in this process.

Power Electronics

I have done quite a lot of researches online learning power electronics by myself. However, I am experiencing a huge gap in between the digital world and the analog world (as a computer engineer, I only have experience with digital circuit). By looking at the picture of a digital power regulator below, I know that the MCU is responsible for generating a PWM to switch On and Off of a power MOSFET switch - depending on the difference between a reference voltage and a feedback voltage, the On and Off time varies to regulate the output voltage.

My analog knowledge is quite limited, what I understand so far is:

  1. The PWM is providing a gate voltage above or below the threshold voltage of the MOSFET
  2. The input voltage is supplying the drain of MOSFET, and the source of MOSFET is connected with a inductor and a capacitor for some "filtering purpose".
  3. The inductor can lag response in current change where the capacitor can drag voltage.

But I must have missed something here. I have been struggling with seeing the whole picture of all these analog components working together to form a complete working regulator.

And, why there are two MOSFET instead of one?

Digital Regulator

Please help me out here.

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closed as too broad by Adam Lawrence, Joe Hass, Matt Young, Chetan Bhargava, Keelan Apr 3 '14 at 7:45

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

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    \$\begingroup\$ Explaining all the ins and outs of power electronics that you're requesting in a single question is far too broad, in my opinion. I think you're best off getting a power electronics book and reading it cover to cover. \$\endgroup\$ – Adam Lawrence Apr 2 '14 at 22:09
  • \$\begingroup\$ The two mosfets shown are one n channel and one p channel, paired, to provide a quicker change between a high and low state. Essentially treated as a single, quicker fet. \$\endgroup\$ – Passerby Apr 2 '14 at 22:13
  • \$\begingroup\$ I am not an application engineer so I don't have to understand every detail about power electronics. What I would really want to see is how should the regulator behaves in response to analog components, which would be sufficient for me to write code on a MCU to generate the PWM for a regulating voltage. \$\endgroup\$ – carterpeng Apr 2 '14 at 23:01
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    \$\begingroup\$ I suggest you read a few wiki articles on AC-DC/DC-DC conversion topologies, such as Buck and Boost converters, and their theory of operation. Those articles will describe the effect of the inductors and diodes. You can get dedicated controller ICs that drive high and low side FETs such as that shown in the picture - an MCU can provide overwatch such as a Sync, enable, and other forms of monitoring inputs.. The dedicated driver devices will react faster than your MCU, with less software errors! \$\endgroup\$ – KyranF Apr 3 '14 at 0:54
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    \$\begingroup\$ KyranF It turned out that the wikipedia pages for Buck/Boost converters were exactly what I had been looking for. Thank you! \$\endgroup\$ – carterpeng Apr 3 '14 at 3:41
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You have closed-loop feedback from the output to the controller. What's basically happening is that the resistor divider is providing a fraction of the output voltage. This is compared against Vref (a very constant voltage). If the measured voltage is lower than this Vref, then the high side pmos transitor needs to turn on. If the voltage is higher than Vref, then the nmos transistor needs to turn on to allow current to continue flowing through the inductor.

Note that most Power Electronics books don't show active rectification so usually you'll see the NMOS there replaced with just a diode pointing up from ground. Active rectification with the NMOS allows a much lower voltage drop between ground and the inductor so you waste less power. If a diode is there, there's generally a significant voltage drop on the order of 0.1 to 0.7 volts, which in a low-voltage power supply is very significant.

More detailed analysis: Vref provides a fraction of the output voltage. ADC (analog to digital converter) converts the voltage to a digital number. Then this value is subtracted from a digital reference voltage number. If the number is positive, then the measured value is less than Vref. The converse is true as well. This information then gets sent into a digital PID (proportional, integral, differential) controller which allows relatively easy control over the output without having too much overshoot, undershoot, or oscillations by a simple algorithm. This algorithm then sends the information along to the driver to go high or low resulting in as smooth of a voltage as possible. The PID controller allows changes in the output load, say turning on a motor, to not droop the voltage too long before the DPWM (digital PWM) corrects it by increasing the duty-cycle of the output to drive the PMOS higher for longer amounts of time to source the extra current needed for the motor turn on.

The nmos or diode is not there to drain power from the system. Rather it's there to allow the load to see uninterrupted current. If there was just a pmos there being turned on and off, when the pmos turns off, there's now an open circuit and the load would no longer receive any power at all. Instead, a diode or nmos allows current to continue flowing (from ground up through the inductor) to the load.

The inductor may be thought of as a component that creates constant current. So regardless of what's on the input (nmos) side of the inductor, the output side of it will have constant current. The inductor resists change in current, so this is the element that allows current to continue flowing even when the nmos or diode is connecting it to ground. The inductor only allows this constant current for a short period of time which is why it's used with a pwm.

The capacitor is a circuit element that tends to resist changes in voltage. This allows the load to see a relatively constant voltage regardless of load changes or the choppy wave coming from the pwm.

The waveforms from the driver will be a variable duty-cycle PWM, i.e. a square wave with high and low times varying each cycle depending upon load. The output from Mosfets should be the inverse of that signal because the mosfets in that configuration act as an inverter. The high-side voltage of this corresponds to the input wave you see in the block diagram picture corresponding to the regulator. So that wave goes into the top of the PMOS. The output of the mosfets & the input of the inductor should switch back and forth between 0 and the wave looking waveform which would sort of be rough square wave. And the output side of it should be the flat line you're shown in the block diagram as the output.

In retrospect of making this explanation, it does seem like a lot of work to go from a bumpy wave -> square wave -> flat line, but there's many advantages including, much smoother voltage regulation, faster response to changes in load, and the ability to lower the voltage to lower than the bumpy wave that was input into it with high efficiency.

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  • \$\begingroup\$ Thank you for the detailed explanation inside a regulator. As for the analog part, i.e. MOSFET, inductor, capacitor, if I am understanding it correctly, the lower switch - which can be either a nmos or diode - serves to drain the energy stored in the capacitor to ground so as to reduce the output voltage, right? What would the waveform looks like after each component, square, triangular, or teethsaw? \$\endgroup\$ – carterpeng Apr 2 '14 at 23:17
  • \$\begingroup\$ I've edited my answer to answer the other questions you asked in your comment. \$\endgroup\$ – horta Apr 3 '14 at 0:02
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    \$\begingroup\$ Excellent! Now everything is becoming clear to me. Thank you so much! \$\endgroup\$ – carterpeng Apr 3 '14 at 0:43
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    \$\begingroup\$ Another really cool part that companies like Texas Instruments implement in their dedicated DC-DC converter ICs is cycle-by-cycle current limiting, where if there is a huge change in pulsed currents the controller can see this and NOT naively pump unlimited power out - they can also count the number of "over current" cycles and then trigger a 'foldback' protection event, where the controller goes into very slow, intermitted pulses to try to recover normal operation - if the load is hort-circuit, this is extremely handy to not blow up everything else on the PCB, or in the load side \$\endgroup\$ – KyranF Apr 3 '14 at 0:51

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