# NMOS CS Amplifier PSpice Simulation Question

I have a rather peculiar question. I am attempting to recreate the circuit below (from one of my labs) of a Common-Source Amplifier design with a bypassed Source Resistance in PSpice. It has the following parameters:

R1 = R2 = 100k

Rd = 1k

Vsig = 100mV peak sinusoidal

f = 5kHz

So far so good. I have the circuit set up the same way as the figure. For my simulation profile, I just want to see the input and output waveforms for now. My question is:

What do I connect to the Coupling Capacitor at the Drain, where the figure shows Vout?

I tried connecting it to Ground and placing a Voltage Pin at the Capacitor which just gave me a 15V DC waveform. I am also told that I should not connect a Load Resistance across it. I'm pretty much stumped on what to connect there and where exactly I am measuring Vout across...

In all of my homeworks and textbook excercises, Vout has been taken across a load resistance connected between Drain and Ground (for a CS Amplifier with bypassed Rs).

Below is my PSpice Circuit and input/output waveforms after connecting a Load Resistance as suggested. For some reason I am seeing signal attenuation instead of amplification..

• Who told you you shouldn't connect a load resistance across it? If you can't have a load what's the point to the amplifier stage? A load resistance to ground should be fine, measure Vout from drain to ground. Make sure the load resistance isn't small enough to load the output excessively. Apr 9, 2014 at 3:34
• John's correct for the most part. A slight clarification is that you should measure Vout across the load resistor you need to add. The capacitor should decouple your drain voltage from the output voltage. This should result in an output sine wave centered around 0V. Apr 9, 2014 at 3:46
• Hmm... that makes sense. Okay, so I added a load resistance of 10K, but my Vout is actually smaller than Vsig... Apr 9, 2014 at 3:57

In Spice simulation you sometimes find that the simulation won't run unless there is something like a resistor in place so a node is not floating. You can insert a 10G resistor for a load and it will behave much like it was floating. Or do as Jim Thompson recommended on sci.electronic.design back on Sep 22, 2004:

Or edit the part pins such that "Float=R-to-GND", and PSpice will automatically place 1/gmin ohms to ground.

Or use a simulated scope probe like 10M in parallel with 10pF.

The short answer is, whatever you feel like connecting to it.

The impedance of the capacitor will block all DC bias voltage and pass whatever the AC signal is generated by the amplifier stage. You could then build a second stage, and then a variable stage, and then a power stage - and so on.

A load resistor from that drain capacitor to ground will drop the full value of the generated AC wave across it, and (of course) pull some current out of the system. When playing with these things, it might also become convenient to intentionally use a load resistor with a small value, so that you can get a ball park idea of the loaded behavior of the circuit. This is especially important in power stages and switching applications.

Circuit is absolutely correct........ go in edit simulation and remove the tick on skip the initial trail bias point + make load R = 100k you will get Gain instead of attenuation. Best of Luck