I have a four layer board: Signal, GND (internal power plane), VCC (internal ground plane), signal. My design includes a chip antenna that requires a completely cleared region at the edge of the PCB. In other words, all four layers in this region must be clear of copper of any kind. I know how to do this on the signal layers by simply limiting the size of my polygon pours on these layers. What I don't know how to do is maintain this cleared ares in the internal power and ground planes. I've played with keepout and cutout regions without success. What's the best approach?
The Keepout layer will only prevent copper on your routed layers. Depending on how you generate your pcb, you can get the same effect on your power/ground planes by using the board cutout feature. For example, define your board shape with the Mechanical 1 layer, and then place a board cutout where you're going to place your antenna. As long as you don't use the routing path feature, you'll be fine.