I have a four layer board: Signal, GND (internal power plane), VCC (internal ground plane), signal. My design includes a chip antenna that requires a completely cleared region at the edge of the PCB. In other words, all four layers in this region must be clear of copper of any kind. I know how to do this on the signal layers by simply limiting the size of my polygon pours on these layers. What I don't know how to do is maintain this cleared ares in the internal power and ground planes. I've played with keepout and cutout regions without success. What's the best approach?
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3 Answers
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Simply place a filled rectangle or polygon on the power and ground planes. Anything you place on the plane layers will become "not copper" on the finished board.
answered Apr 15, 2014 at 23:14
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\$\begingroup\$ For clearing all layers, you can also just put a feature on the Keep-Out layer. \$\endgroup\$ Commented Apr 15, 2014 at 23:21
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\$\begingroup\$ The proper thing to remember here are internal planes are negative layers. In other words, they are bu default copper-filled, and anything you draw in them becomes a empty region. \$\endgroup\$ Commented May 16, 2014 at 4:28
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The Keepout layer will only prevent copper on your routed layers. Depending on how you generate your pcb, you can get the same effect on your power/ground planes by using the board cutout feature. For example, define your board shape with the Mechanical 1 layer, and then place a board cutout where you're going to place your antenna. As long as you don't use the routing path feature, you'll be fine.
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I've recently successfully used cutout regions for exactly the same purpose. I'd never used them before so it took a little tinkering, but it does work.
