If an nmos which has the gate and drain connected to VDD, and the source connected to a grounded capacitor, the nmos will start conducting and the capacitor will start charging as long as VDD > VTn (the threshold voltage of the nmos). The gate is connected to VDD and the source is connected to a grounded capacitor so VGS = VDD - Vx (Voltage across capacitor).
Because the nmos is in conducting mode it will act like a resistor, so a current can flow from VDD to the the capacitor and charge it. This should keep charging until Vx equals VDD, but apparently it doesn't. In steady state, the capacitors final charge value is VDD-VTn.
Why does this happen?
The threshold voltage (Vtn) concerns the voltage that the gate needs to be at before a conducting channel between the source and drain can form. Why would this cause the capacitor not to charge to VDD when the capacitor isn't connected to the gate?
The picture below shows the circuit which I am talking about.