The 4-wire SPI bus has a considerable speed advantage over I²C, but unfortunately so far as I know has no standard way to perform handshaking without using extra wires beyond the four (and four wires is already annoying enough as it is).
For a recent project where the slave was a CPLD, I implemented a nice approach to provide handshaking in one direction (slave can make master wait) and also incidentally eliminate the need for the /FS line. The signals are Clock, MOSI (master-out/slave-in) and MISO (master-in slave-out).
Clock idles low; both MISO and MOSI output on the rising edge of Clock and are sampled on the falling edge. Two or more consecutive rising edges on MOSI wire while Clock is low will reset communication.
When Clock is low and MOSI is high, MISO will indicate whether the slave is ready. When clock and MOSI are both low, MISO will indicate whether the slave wants attention.
While this approach works very nicely when communicating between my CPLD and my controller, it would be nice if the same approach could be used when communicating between two standard microcontrollers. The biggest features that would be necessary to make this work nicely would be:
- the ability of the slave controller to reset itself upon receiving some number (probably 2 or 3) of rising edges on MOSI while clock is idle;
- the ability of the slave to control the clock-idle state of MISO, and preferably load separate values for use when MOSI is high or when it is low;
- preferably, the ability for the master to control the state of MOSI that will be output when the clock is idle between bytes (in my protocol, the commands which need handshaking have the LSB set, but that's a bit of a nuisance);
- for buffered SPI ports, the ability for the master to wait on the slave's data line.
Do any common controllers or slave devices offer such features, or work in such a way?