I am working on a project which requires communication of data between Xilinx Spartan 6 FPGA (XC6SLX45T-2FGG484) and OMAP 3530, I have a ULK dev board on which
The 32Kx8 (256Kbits) serial electrically erasable PROM (24AA256-I/SM) from Microchip is used to interface with OMAP processor through I2C interface.
The same 32Kx8 (256Kbits) serial EEPROM (24AA256-I/SM) from Microchip is used to interface with FPGA through I2C interface. The I2C is common to both processor and FPGA.
The GPMC bus of the OMAP3530 processor is used to communicate with Spartan-6 FPGA for register read/write and for programming the FPGA. here GPMC controller signals of OMAP3530 Processor will be Configuring in address/data non-multiplexed mode. As well as Chip select signals (CS0-4), SPI3, I2C3 and GPIO signals will be connected to FPGA for misc communication. To generate interrupt from FPGA Processor two dedicated GPIO signals are used.
Now I am not sure where to start,
- what is the choice
a. can I use the EEPROM as like shared memory into which processor and fpga perform r/w operations. what would be the feasibility and speed implications of such an implementation.
b. can I Use GPMC misc communication part..? how shall I go about it?
which of the two would be more appropriate? and how shall I move ahead, kindly forgive my ignorance,if I made some mistakes or interpreted data wrongly.