So, I grabbed some code online and morphed it to work with my DE2-115 board, and now I need some help understanding exactly how it works.
DDS_accum <= DDS_accum + 32'h16FC7BBC + ((256+((message==0)? message[15:7]+256 : message[15:7]-256))<<15) ; // "audio input"
I need help understand exactly why the above Verilog HDL line exists. The large block of code shown below is to show you where it's implemented.
This is the main block of my Senior Design Project, but, my major at college teaches me about software and hardware, not so much Frequency Modulation. So, a lot of this is going right over my head.
I've read through this and some wikipedia pages and some youtube videos, but, I just don't understand the point of the constant and playing with the message signal in the line above.
//make a direct digital synthesis accumulator // and output a 10-bit sine wave to the VGA plug // set carrier frequency to 1 MHz DDS_incr = 32'h51EB84C = 85,899,340 // 11 MHz 32'h3851DCA8 = 944889000 // 9 MHz 2DF8F778 (771291000) : 4.5 16FC7BBC (385,645,500) // 7 Mhz 274AF224 (659223076) // set modulation to 400 Hz 85E7 // This outputs at 146.0 MHz. always @ (posedge CLOCK_50) begin //generate 4.5 Mhz square wave carrier with FM modulation // 32'h16FC7BBC = 385645500 DDS_accum <= DDS_accum + 32'h16FC7BBC + ((256+((message==0)? message[15:7]+256 : message[15:7]-256))<<15) ; // "audio input" end //hook up the ROM table for carrier sqwave sqTable(CLOCK_50, DDS_accum[31:24], sq_out); //use the VGA DAC for an FM modulated RF signal assign VGA_R = sq_out; assign VGA_SYNC = 1 ; assign VGA_BLANK = 1 ; endmodule ////////////////////////////////////////////////// // Square wave table for the DDS module sqwave (clock, address, sq); input clock; input [7:0] address; output [7:0] sq; // changed to 7:0 reg [7:0] sq; // changed to 7:0 always @ (posedge clock) begin sq <= (address<128)? 8'h7f : 8'h01 ; // changed end endmodule ///////////////////////////////////////////////////
I apologize for the large block of code, but that's the heart of this FM Transmitter. This code modulates a 24-bit input audio signal from the Line In port and out the VGA_R port as an FM signal at around 146.0 MHz.