On the Atmel AVR 328P on the Arduino Uno, the ADC's an R(ain) value is 100Mohm - which I assume is the ADC input impedance? However, in the datasheet it says "The ADC is optimized for analog signals with an output impedance of approximately 10 kohm or less."

How do you figure out the ideal output impedance to work with the ADC? I'm trying to figure out how this applies to other discrete ADCs which have an input impedance that varies with sampling frequency... for example on one part the input impedance varies from 125kohm to 65Mohm. How would I figure out what the max allowable input impedance should be?

Also - am I even asking the right questions here or am I missing something huge?

  • \$\begingroup\$ How do you figure out the ideal output impedance to work with the ADC? The output impedance should be as lower as possible, ideally being zero.. \$\endgroup\$ – m.Alin Apr 24 '14 at 9:02
  • \$\begingroup\$ To solve that problem you have there with large impedance, just use a buffer (op-amp buffer will do). \$\endgroup\$ – Gomunkul Apr 24 '14 at 17:01

In case you are left wondering how the input resistance is spec'd as 100M, yet the impedance recommended driving for driving the input is 10k: The following diagram illustrates the input to the ATMega A/D:

enter image description here

As KyranF described, the task of your external circuitry is to ensure that the sampling capacitor CSH gets charged to a voltage that's within some percentage of the input voltage, within the sampling time. The charging process is slowed by the resistance of your voltage source, and by the resistance of the circuitry between the ADCn pin and the sampling capacitor, here shown as "1..100k ohm".

(That "1..100k" is a vast range, and I would be interested what the range actually is in practice.)

Not shown in the diagram are additional small capacitances associated with the multiplexer. And RAIN is also omitted, as it's insignificant compared to IIH and IIL (max 1uA).

The recommendation that your voltage source be less than 10k is essentially saying that we don't want the source resistance to slow the charging of CSH (and any other capacitances) significantly compared to the already present resistance, and relative to the sampling time. (However, the "1..100k" doesn't back that up very rigorously.)

Looking at this from another point of view, the supposed "100M" input resistance of ADCn pins is not the whole story. RAIN is parallel with IIH and IIL , which, when selected is also parallel with the "1..100k in series with 14pF" load.

In the sense that the 100M || IIH || IIL represent the entirety of the DC characteristics, it is legitimate, but it's not the relevant part of the load for our design purposes. We need to design to drive the "1..100k in series with 14pF" AC part of the load, which Atmel tells us is best done with a 10k source resistance.

(Note that in discussions the term "impedance" may or may not imply that non-resistive AC characteristics are expected, and is sometimes used where what is really meant is "resistance".)

[Edit -- cuz this turns out to be quite interesting...]

Adding some ballpark sample and hold settling times:

With R = 100k, and C = 14pF, the RC time constant (TC) is 1.4 usec.

For ATMega, the S/H time is 1.5 cycles of the ADC clock. For a midrange ADC rate of 100kHz, that puts the S/H time at 15usec. So that's a bit over 10 TC.

The voltage on a capacitor settles to within 37% of its final value in one time constant, 5% in 3TC, 1% in 5TC and 0.1% in 7TC (corresponding to +/- 1 bit of 10-bits resolution).

You can see that doubling the input R to 200k, or doubling the AD clock rate, will chew into the resolution. But a change of input R from 10k down to 1k doesn't do us much good... though it could be beneficial for external reasons, like lower sensitivity to neighboring noisy signals.

Hope that helps.

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  • \$\begingroup\$ indeed! good expansion on my ramblings haha \$\endgroup\$ – KyranF Apr 24 '14 at 0:31

The internal sampling capacitor of an ADC peripheral in your Uno's ATMEGA328P needs to charge, so you can sample it right? Well, in this case the internal resistor ( input impedence ) has been given as 100M Ohm. The capacitor needs to be charged by the analog source with <= 10K Ohm, so that it will be charged enough ready for sampling. If you charge the cap too slow, you will have scale error/false readings.

It's possible that if you have a terribly slow/weak analog input you should put a voltage buffer op-amp in unity gain - and find one with extremely low offset voltage/bias current, and high enough bandwidth/slew rate (so it doesnt affect your signal as good as possible), with a output resistor of 5-10K Ohm to drive your ADC inputs fast enough.

Every microcontroller that has an internal ADC peripheral, and the many dedicated ADC ICs are different, and they will all need special attention to things like this, so it's good that you read about it and have asked questions about it.

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  • \$\begingroup\$ Regarding this: "with a output resistor of 5-10K Ohm to drive your ADC inputs fast enough." Is it necessary to place a resistor there? Another person mentioned that 0 output impedance is ideal. Is it a bad practice to drive the ADC input straight from the op amp? \$\endgroup\$ – Pugz Apr 24 '14 at 13:44
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    \$\begingroup\$ Well if you wanted ultra fast sampling then as low impedance as possible is best, so no resistor. The opamp itself has inherent output impedance, but it is very low. I think the resistor is good for slowing down current spikes into the sampling capacitor. Slowing things down a bit is a safe assumption! If you can spare the PCB space and component count, I would advise you to do it. \$\endgroup\$ – KyranF Apr 25 '14 at 0:38

How do you figure out the ideal output impedance to work with the ADC?

By reading the datasheet. You even quoted the section that tells you this answer on a silver platter: The ADC is optimized for analog signals with an output impedance of approximately 10 kohm or less.

So the answer is feed it a signal that has 10 kΩ or less impedance.

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