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I am going to try to interface a low-speed 8-bit DDR2 chip with an FPGA, and I've got some questions crucial to make it work:

Is that correct that there is on-die termination on both DDR2 memory and controllers (an Altera Cyclone 3 FPGA in my case), so no additional termination resistors are required?

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  • \$\begingroup\$ A DDR2 Chip - As in a Dram IC, or a DDR Card, as in the kind of memory module you see in a desktop computer (which are not, and will never really be "chips", even if some uneducated people like to call them so)? \$\endgroup\$ – Connor Wolf Mar 2 '11 at 7:25
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    \$\begingroup\$ Single DDR2 IC. Interfacing to whole DIMM is pretty hardcore for beginners :-) \$\endgroup\$ – BarsMonster Mar 2 '11 at 9:02
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Yes, all DDR2 chips have it on-board. It is a required part of the standard.

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  • \$\begingroup\$ DDR2 is controlled by JEDEC, which has gratis standards, right? What is the number of the relevant standard? \$\endgroup\$ – Kevin Vermeer Mar 1 '11 at 20:00
  • \$\begingroup\$ I don't have the standard; check Micron's web site for DDR2 data sheets and application notes. \$\endgroup\$ – Brian Carlton Mar 2 '11 at 16:31
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    \$\begingroup\$ JESD79-2F is the JEDEC standard number for DDR2. The chips must have an ODT pin which enables/disables on-board termination. \$\endgroup\$ – Fizz Jan 8 '15 at 1:31
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    \$\begingroup\$ Also, you can control the strength: infinite-ohms, 75-ohms, and 150-ohms are required. Some chips support 50-ohms too. \$\endgroup\$ – lamont cranston Jul 7 '15 at 21:14

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