I hooked up a crystal oscillator (4 pins) to Vcc + Gnd and observed the generated waveform using my scope. I think everyone will agree the waveform shown is very distorted and I am not sure why. Any ideas?
\$\begingroup\$
\$\endgroup\$
Add a comment
|
1 Answer
\$\begingroup\$
\$\endgroup\$
8
This is a classic square wave as detected by a scope set up with an inadequate ground connection. A few tips (in order of importance):
1 - Connect the scope ground as close to the clock ground as possible.
2 - Make sure the clock chip is bypassed as close as humanly possible to the ground and power leads, with the capacitor leads as short as possible.
3 - If you have a choice of ground leads for the scope, use the shortest one available.
4 - Connect the scope probe as close to the clock output as possible.
answered May 15, 2014 at 1:06
-
\$\begingroup\$ I re-worked the ground connections and now it actually looks like a square wave, however with an overshoot (only when raising). With only the scope loading the output I guess I might see more inductive interference so I tried loading the output with a small resistor but the overshoot stayed. BTW - why poor ground caused this shape? \$\endgroup\$ Commented May 15, 2014 at 1:26
-
\$\begingroup\$ What kind of probe are you using? If using a 10x, have you checked its compensation? \$\endgroup\$– RJRCommented May 15, 2014 at 2:04
-
2\$\begingroup\$ With a rising or falling edge, you get di/dt effects on the ground lead inductances. Logic levels change very fast, and differently between rising and falling edges, so it doesn't take much stray inductance to cause major problems. Using a solderless breadboard (like you're probably doing) makes the whole thing worse - big parasitic values. The effect can actually cause problems when sending signals from one IC to another, and this is why if you make a PC board you are well-advised to use ground planes. \$\endgroup\$ Commented May 15, 2014 at 2:36
-
\$\begingroup\$ @WhatRoughBeast - The over/undershoots are OK because I understand this is from the stray inductance of all the long wires involved. After the initial proof of design I will design a PCB off course and will probably move to SMD parts, also in the intention of minimizing parasitics. Regarding a PCB, by ground plane you mean having the bottom side all running ground and top VCC plane to have a small capacitance between them? \$\endgroup\$ Commented May 15, 2014 at 10:17
-
\$\begingroup\$ By ground plane I mean that one copper plane is (as far as possible) entirely dedicated to ground, with no separate traces. This minimizes both inductance and resistance between parts of the circuit. Ideally, you also have a Vcc plane with similar constraints, which optimizes voltage distributioin. Of course, if you're using a 2-sided PCB, that doesn't leave much room for signal connections. That's why multilayer PCBs are the norm these days for digital circuits. The small capacitance between the planes is just a bonus. \$\endgroup\$ Commented May 15, 2014 at 12:40