# How can I change a +/- 5V Sine Wave to a (0 to 5V) signal for an ADC

I've been digging into this for the past couple of days and I could really use some help. Here's the details:

Input: Sine wave going from +5V to -5V

Output(needs to be): 0V to +5V [0v when input is -5v and 5v when input is +5v]

I understand that I need to reduce the amplitude by 0.5 and there needs to be a +2.5V offset, I just don't know how to get there.

I've tried a few op amp setups with my 358 and 741 but have not had any success. Any help would be much appreciated. Thanks!

This is very easy:

R1 and R2 must be equal in your case. The overall values of R1 and R2 depend on things you haven't told us, like the source impedance and the maximum allowed impedance of OUT. If OUT is a signal going into something like a microcontroller A/D, then start with 10 kΩ for R1 and R2.

A better answer will require a better question.

From page 142 of IC Op-Amp Cookbook 3ed., Jung, you can come up with the following circuit. Note that the offset also is affected by the gain resistors, so that the output offset is Vo_offset = V+ * (1+R1/R2)

A couple of notes for implementing this circuit:

• The resistor values are for reference only. You should scale them to your circuit impedance vs power consumption requirements.
• You need a feedback capacitor parallel to R1 to make sure it's stable at high frequencies
• You probably only need to use a 5V rail-to-rail op-amp to make this circuit work. V- is always pegged at the V+ voltage, so the input node will never swing outside 0-5V.
• Almost forgot! This is an inverting circuit, so remember to either put an inverting stage in front of it, or remember to 'adjust' the numerical output of the ADC (ie 65536 - ADC_VAL for 16-bit)

Good luck!

simulate this circuit – Schematic created using CircuitLab

If it's being inputted to an ADC then maybe you should just consider lowering the amplitude by a fraction over 2:1 to account for the ADC probably not being exactly on-song at the limits of 0V and +5V. Clearly 2.5V needs to be the "new" mid-rail and this can be made from an existing 5V supply by using a potential divider with two resistors.

Then, couple the input signal capacitively to the centre point of the potential divider using a cap and a resistor. Something like this: -

simulate this circuit – Schematic created using CircuitLab

The two 18k resistors form a 9k impedance to 2.5V and with R3, the input is attenuated to: -

attenuation = $\dfrac{9}{9 + 10}$ = 47.4% i.e. purposefully just short of 50% so that the ADC's real working range is properly accommodated.

C1 disconnects the input's offset voltage from the output but if you are perfectly happy keeping DC coupling then Olin's answer is the simplest.