# Given metal dimensions and material, is it possible to determine the maximum current that the structure can handle? [semiconductor processing]

I have a linewidth structure that has very low resistance. I want to know the maximum current that this structure can handle.

Since the resistance of the metal is so low, it's hard to measure the voltage drop. We can't change the size of the structure (as it's on all our masks and we're also limited in real estate) and we can't increase the voltage resolution of our tester (without sacrificing capacity or spending money).

So the only solution that I can think of is to increase the test current.

I've been searching for an equation or series of equations that will tell me at what current the structure will break (like a fuse). I'm sure that, given the structure dimensions (LWH) and the material parameters (resistivity, thermal conductance, etc), this or other similar equation exists. However, I can't seem to figure it out...

And then, to make things more complicated, I'm pulsing this current with a pulse width <= 100ms. It's normally only a single pulse, so a duty cycle doesn't make much sense.

Thanks,

• You mean, you're only pulsing it once per 1000 seconds? Or did you mean pulse width <100usec? – WhatRoughBeast May 20 '14 at 18:55
• I use 150 amps per square cm .... i am still trying to remember where that comes from.... – Spoon May 20 '14 at 18:59
• Well, I'm really only pulsing it once with a pulse of 100ms or less, so I guess duty cycle doesn't really make sense... I've updated the post to be more clear. – dthor May 20 '14 at 18:59
• My recollection of IC wiring, when embedded in SiO$_2$, is that a continuous current on the order of $10^5$ A/cm$^2$ is acceptable. However, there are many variables involved, including the grain structure of the metal and the uniformity of the line width. – Joe Hass May 20 '14 at 19:29

Well, there are papers out there such as this one that predict the fusing current limits. The current limits set for normal long-term continous operation of ICs are not limited by fusing current, but by electromigration, so they'd be pretty conservative.

You could also just sacrifice a few samples to determine what the limits are empirically.

I'm not sure this will lead to the results you want- whether it's aluminum or copper or something else, the metal is going to have a significant temperature coefficient, and if you're pulsing it so it heats up by hundreds of K, how will you separate the temperature effect from the room-temperature resistance? I suppose if you had enough points you could extrapolate a curve back into the grass where the temperature change is minimal.

I know every problem doesn't have a circuit design as the solution, but could you just make a preamplifier for your tester?

• It's looking like I'm just going to have to run the DOE and break things. A preamp might work, but it would also have to be able to handle HV, as this is part of a much larger production tester that probes many different structures. As for the R vs T correlation, we're already correcting for it, so it won't be too difficult to modify that correction, as long as I know the new T. – dthor May 20 '14 at 20:21
• Okay, I hope the paper I linked Thermal analysis of the fusion limits of metal interconnect under short duration current pulses (freely downloadable) might help too. Pretty close to what you're asking, but they didn't get all that good agreement with their models. – Spehro Pefhany May 20 '14 at 20:35

If you know the metal composition, you can easily find the bulk resistivity. Once you know that, from the line dimensions you can compute resistance.

Copper, for instance, has a resistivity (rho) of $1.68 \times 10^{-8} \Omega m$. Pouillet's Law says $R = \rho\dfrac{L}{A}$, where L is length and A is cross-sectional area.

If you want to determine melting current, you have to factor in thermal capacitance and resistivity thermal coefficient, but to a first order this is fairly straightforward, particularly for very short pulses, where there is little time for heat to diffuse and/or radiate away from the hot spots.

• The 2nd part is where I'm failing. I know how to calculate sheet rho, both by theoretical and electrical measurement means. It's been too long since I've done any thermal stuff. – dthor May 20 '14 at 19:41

The maximum current for a given metal structure in an integrated circuit depends on many factors such as conductor material, geometry, dimensions, temperature, target product life time. While you can easily make a hand estimation for the resistance of a given structure it's not so easy for the maximum current.

This is why you can find this information in the design manual of your semiconductor process.

Usually you will find a realtion between current density and life time (higher current decreases circuit life time) as well as an absolute maximum current.

• Current density vs lifetime is electromigration. I'm only interested in the max short-term current I can push through this DUT. – dthor May 20 '14 at 19:40
• In my experience, the foundry provides recommendations for maximum current density to give a device lifetime of 10 years at some maximum operating temperature. I've never seen anything like a short-term fusing current specified, because no one intends to operate a chip even close to those conditions. Can you provide an example of an absolute maximum current spec? – Joe Hass May 20 '14 at 19:40