Related resource - too big for a comment:
Mention was made of static voltage and large transistors.
A MOSFET gate has a max allowed voltage due to the VERY thin dielectric layer between gate and channel. For a given specified voltage it does not matter if the device is small large of gi-normous - exceed Vgs max by some unknown small amount and it dieth. The gate to channel oxide ruptures and the device is usually destroyed.
A very large device MY have a larger Cgs capacitance and so save you from smaller charge discharges which are not enough to provide the charge needed to get the voltage high enough. But, generally you need vanishingly little charge compared to what is readily available to exceed Vgs max.
Generally, lower voltage (low Vds) FETs have lower Vgs max but this is not a 1:1 correspondence. Very low gate threshold voltage FETs (eg under 1V turn on) will often have Vgsmax of only 10V and some are as low as ~+ 5V but this is rare. Most FETs specify 20V Vgsmax, but this should be check on a case by case basis.
Where Vgs can exceed Vgsmax a reverse biased zener from gate to source usually provides enough protection. Where Vgate_drive exceeds Vzener the balance will be dropped across the drive to gate resistor and this needs to be designed for.
If an inductive load is used then it is VERY wise to use the Zgs zener as above to dissipate excess energy coupled into the gate from the drain circuit by Millar capacitance coupling.