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I am trying to design a feedback amplifier with ADA4004. My desired gain is about 42dB@2kHz. Is it possible to design a stable amplifier with such gain using ADA4004?

The ADA4004`s GBP is 12MHz. The slew rate is 2.7V/us. The output voltage range is -2V~2V. Here is the schematic:

schematic

simulate this circuit – Schematic created using CircuitLab

I have simulated it in Multisim and found that the phase margin is larger than 90 degree. Is it OK?

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  • \$\begingroup\$ Positive feedback? \$\endgroup\$ – Andy aka May 29 '14 at 8:29
  • \$\begingroup\$ oh,sorry,not positive feedback. \$\endgroup\$ – billyzhao May 29 '14 at 8:45
  • \$\begingroup\$ A phase margin of such an amplifier cannot be above 90 deg. How did you simulate? According to the gain-phase diagram as shown below, the margin for unity gain application (worst case) is about 65 deg. \$\endgroup\$ – LvW May 29 '14 at 9:12
  • \$\begingroup\$ It still says "positive" in the title of the question. \$\endgroup\$ – Andy aka May 29 '14 at 11:17
  • \$\begingroup\$ Maybe I made a mistake. I learned that the phase margin is the difference between the 0dB point phase and -180 degree phase. I simulated the design and found that the 0dB point phase is about -83 degree. Then the phase margin is about 97 degree. Does this criterion correct? \$\endgroup\$ – billyzhao May 30 '14 at 3:09
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The open loop response of the device is this: -

enter image description here

In red I've drawn your actual response which has a 3dB point at about 7.4kHz and then rolls off due to the 33pF cap at 20 dB per decade of frequency.

Where the red line crosses the 0dB line on the Y axis, you can see that the phase response has hardly shifted from 90 degrees (maybe it's 85 degrees). This, to me indicates that your phase margin is about 85 degrees and should be totally stable.

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  • \$\begingroup\$ Really? Thank you very much! But one problem. I am the newbie. I have not seen your way to solve the problem before. Is it a common way by drawing the closed loop gain on this kind of figure and check the 0dB phase. And that phase means the phase margin? \$\endgroup\$ – billyzhao May 29 '14 at 8:56
  • \$\begingroup\$ No - not really. For phase margin determination you need the gain and phase plot of the LOOP GAIN. That is the product of the opamps open-loop response multiplied with the ransfer function of the feedback path. \$\endgroup\$ – LvW May 29 '14 at 9:25
  • \$\begingroup\$ @LvW When feedback is applied and the frequency is low, the closed loop gain and phase responses become fully defined by the feedback elements. As frequency rises there comes a point where closed loop gain starts to follow the open loop gain and the same happens for phase - this won't reach this point because of the 33pF capacitor. \$\endgroup\$ – Andy aka May 29 '14 at 10:01
  • \$\begingroup\$ @Andy aka: I was of the opinion that we speak about phase margin determination, don´t we? And for this purpose, we have to investigate the HIGH fequency region where the loop gain approaches 0 db. Or did I misunderstand something? \$\endgroup\$ – LvW May 29 '14 at 14:29
  • \$\begingroup\$ Thank you LvW. But do you mean that I should check the bode plot of the closed loop gain after simulation and find the 0dB point to get the phase margin? \$\endgroup\$ – billyzhao May 30 '14 at 3:01

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