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One of my clients is experiencing problems with a SMSC LAN8710A PHY that is connected to a Xilinx FPGA. The Ethernet link works perfectly when the board is connected to my MacBook or to my office router, but fails with other partners such as USB-Ethernet adapters. In that case, the auto-negotiation succeeds but the link does not go up and the PHY reports symbol errors through its SYM_ERR_CNT register.

I'm suspecting a signal integrity issue on the board. Is there anything else that could explain this behavior? Any advice about how to debug issues like these?

Update: the symbol errors (there are usually one or two of them) seem to happen shortly after the link goes up. When auto-negotiation is OFF, the symbol error count remains at 1 or 2 and the link works fine. When ON, auto-negotiation re-starts every second or so and the symbol error counter gets incremented every time.

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  • \$\begingroup\$ Have you tried it with a straight-through vs. crossover cable (in case something's screwed up with Auto-MDIX)? \$\endgroup\$ – Spehro Pefhany Jun 4 '14 at 12:18
  • \$\begingroup\$ Thanks for the suggestion. I'm seeing the same behavior with both types of cables. \$\endgroup\$ – geschema Jun 4 '14 at 12:54
  • \$\begingroup\$ Have you checked the tolerance of the reference clock used for the MAC / PHY link on your board? Ethernet requires a tighter tolerance (i.e. lower ppm rating) than your plain old garden variety microprocessor crystal. \$\endgroup\$ – Michael Karas Jun 4 '14 at 13:08
  • \$\begingroup\$ Another comment - You could also have some issues with coupled noise into your Ethernet circuitry from the likes of nearby switcher power supplies or poorly bypassed FPGA and MCU circuitry. \$\endgroup\$ – Michael Karas Jun 4 '14 at 13:16
  • \$\begingroup\$ Are the mag jacks themselves known to be okay? If the layout and power supplies are reasonable, and the circuitry around the jacks correct and in place, that might be another place to look. \$\endgroup\$ – Spehro Pefhany Jun 4 '14 at 14:37
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I can't comment yet so I'll post this as an answer.. I've had a similar problem in the past with a DP8384C and we were able to get the link to work by forcing the connection to 10mbps (on either end).

We had to re-spin the boards to fix it but it helped debug the issue. We basically rebalanced the differential pairs lengths from the PHY to the magjack and checked trace impedances, haven't had any issues on any designs since.

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A few things you could try:

  1. Double check the circuitry around the magnetics on your board. If anything is incorrect you are likely to have difficulty with some link partners and not others.

  2. Turn off auto-negotiation and force both ends to the same speed.

  3. You suspect SI issues - dig out the scope and have a look at when the PHY sees.

If you can transmit OK without errors at (forced) 10MBit/s but can't get link at 100MBit/s I'd start reviewing the schematics and board design and probing signals with a scope, starting from the magnetics.

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  • \$\begingroup\$ Thanks for your post. Disabling auto-negotiation helps to get the link up, but this is obviously just a temporary fix. Also, it does not help against symbol errors. \$\endgroup\$ – geschema Jun 4 '14 at 12:17
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    \$\begingroup\$ Design integrity for Ethernet is important even for a 100-BaseT network. Do not discount the need for a designer to play very close attention the signal integrity requirements and the layout requirements for a MAC/PHY and the PHY/RJ45 connection paths. Grounding methodology is very important too. \$\endgroup\$ – Michael Karas Jun 4 '14 at 13:13
  • \$\begingroup\$ @MichaelKaras Granted - I've updated my answer to incorporate your feedback. \$\endgroup\$ – Chiggs Jun 4 '14 at 14:33

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