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It is said that a decoder with n input has 2n outputs corresponding to the 2n minterms of the n input variables. An n-to-2n decoder and m OR gates can, therefore, implement any combinational logic circuit.

Can anyone explain more detail about why, therefore, it can implement any combinational logic circuit?

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This smells of homework, and anyway finding such things out for yourself is far better for you in the end, so I'll just give you a hint.

Draw the truth table of the n-input 1-output function that you want to make. The 2n outputs of your decoder correspond to the rows in your truth table. You want the result to be a 1 in the rows where you have put a one in the output column. Now how would you connect a many-input OR to achieve that? If have only let's say 2-input OR gates, how could you make an x-input OR?

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I don't remember 100% of this as it was a long time ago but basically it's something like:

Decoders produce 2n minterms of n inputs, external or gates can be used to implement logical function in SOP form.

Steps: 1. Get the functions into canonical SOP form 2. Get a decoder with sufficient number of inputs for your functions 3. Insert external gates of proper size and start wiring according to the functions

Not a full answer but hope this helps a bit ...

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