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I'm a software engineer doing some basic (I thought) hardware design. I have built a 5V power supply around an Analog Devices ADP2303 non synchronous step-down regulator. The schematic is from the top of page 25 in their data sheet.

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I have three PCBs built, the original prototype and two "second generation". The schematics and parts are the same but the PCB layouts are slightly different (I had to cut traces and add two jumpers on the original to get around a design error). My problem is that the original board works perfectly, holding 5 VDC under load, but in both newer boards, the output drops to 2.4V when I connect a load - a Raspberry Pi. In all three cases, I'm using the exact same 12V 5A AC adaptor as a power source.

I have no idea how to debug this problem and would appreciate any pointers. I do not have an oscilloscope, so I hope that's not a requirement.

In looking more closely at my PCB layout, I definitely did not follow AD's layout at all, in either generation of board. But the two big differences are (a) gen-1 punched the ADP2303 ground pad thru to a full ground plane on the back of the PCB, while the gen-2 did not (I don't know why), and (b) in gen-1 the connections between pin 5 (FB) and the output capacitor and between pin 7 and ground are jumper wires instead of traces. So I'm wondering what the likelihood is that these differences are responsible for the fact that gen-1 can support a Raspberry Pi at 5V while gen-2 output drops to 2.4V when connected to a Pi, and whether redesigning this part of the board will solve the problem.

[update]

As there is a clear consensus that my PCB layout is really pathetic, I am redesigning based on AD's recommended layout:

Recommended PCB layout

Thank you all so much for taking the time to explain and recommend. I will update with my results when I get the redesigned board.

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  • \$\begingroup\$ When you designed your PCB, did you copy their ADP2303 Evaluation Board layout and component list? (analog.com/static/imported-files/user_guides/UG-189.pdf) This device switches at 700kHz, so the choice of components (L, D, COUT) is important. Companies like AD make evaluation kits because component choice, placement, and routing can be so critical, it's not enough to just copy the schematic. I've done similar switching power supply EV kit layouts for one of AD's competitors, their 4-layer evaluation board layout looks sensible and correct. \$\endgroup\$ – MarkU Jun 14 '14 at 2:30
  • \$\begingroup\$ While I did not copy the eval board, I did make the effort to copy, as well as possible, the layout (and schematic) in the data sheet. I also matched all recommended component values. \$\endgroup\$ – Russ Kuhn Jun 14 '14 at 21:35
  • \$\begingroup\$ I stand corrected on my previous reply (see edited question). Sorry about that. \$\endgroup\$ – Russ Kuhn Jun 17 '14 at 16:06
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If I understand correctly, you have two generations of PCB with the same parts but different layout. And the following result:

  • Gen 1 - no voltage drop
  • Gen 2 - voltage drops from 5 to 2.4 under load

If the components are the same, then the problem must be with connections. You may have an open or a short somewhere, or forgot to connect some component lead. You basically need to perform circuit analysis and determine what is different. Your Gen 1 proves that the circuit and components are capable of working, but then Gen 2 board has a flaw. My hunch is that the task of cutting traces and adding jumpers to correct a design flaw is incomplete: there must be (an) additional design flaw(s) you overlooked.

Debugging it needn't involve an oscilloscope unless you need to look at high speed signals in your circuit.

  • Power off the board and closely inspect all traces and connections. Does the Gen 2 board match exactly (electrically) the Gen 1 board?
  • Verify with a multimeter that traces are connected to places they ought to be, and that they aren't shorted to places they shouldn't. Ideally this would be done before populating the board with components, but you should still be able to confidently say that your ground plane isn't shorted to something else, and so forth.
  • Are you sure the components are the same? In populating the Gen 2 boards, is it possible you used the wrong value component somewhere which disagrees with the Gen 1 version? A transistor mounted incorrectly or a diode installed backwards can cause strange results.
  • With power on, there may be a component overheating because it is drawing excess current (and thus causing your supply voltage to drop). Leaving it powered on could cause further damage, but you might be able to quickly determine what component(s) are overheating (if any). Additionally, you might be able to make some quick voltage measurements with a multimeter to compare the Gen 1 and Gen 2 boards. Finding what nets are the same voltage in both generations could help you isolate a component or board section that is flawed.
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  • \$\begingroup\$ Thank you for the wonderfully detailed answer. Your understanding is correct. I used DipTrace to create the schematic and the PCB and to verify that the PCB and schematic match and that there are no crossed nets. I know the parts are the same because as I bought them all at the same time. I do have a third gen-2 board, completely unpopulated. Your suggestions make me think I might want to check the traces and then build out just that power supply since there are only 7 parts and see how that works. Would that make sense? \$\endgroup\$ – Russ Kuhn Jun 14 '14 at 21:22
  • \$\begingroup\$ The unpopulated board should be extremely useful in verifying that there aren't any defects with the board. Even if you got the design perfect in DipTrace, it's possible the PCB manufacturer introduced a problem. Good luck figuring out what it is. Please consider posting an answer with the resolution if you come to a conclusion. \$\endgroup\$ – JYelton Jun 15 '14 at 2:47
  • \$\begingroup\$ The (nearly) unpopulated board exhibits exactly the same voltage drop. So is it possible that my bad PCB layout (see edited question) is entirely responsible for this problem? \$\endgroup\$ – Russ Kuhn Jun 17 '14 at 16:10
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    \$\begingroup\$ @Russ I think it's not just possible, but likely. It's difficult to advise without being able to see the board layout, make measurements, etc. I'm not sure if posting the board layout would be useful or not, but someone might be able to spot an issue. \$\endgroup\$ – JYelton Jun 17 '14 at 19:43
  • \$\begingroup\$ I got my revised boards that followed AD's design and, sure enough, the problem is entirely gone. Voltage is fully maintained when I connect the Raspberry Pi. So the lesson (for me anyway) is "just follow the chip manufacturer's layout". I really don't know why the first board worked, beginner's luck (good or bad) I guess. Thanks for all your help. \$\endgroup\$ – Russ Kuhn Jul 16 '14 at 15:37
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Analog Devices has an evaluation board for this ADP2303 3A step-down switch-mode power supply. Even if you don't have the actual board, the user guide is worth reading (http://analog.com/static/imported-files/user_guides/UG-189.pdf). This type of product and its PCB layout are generally similar to products I've done years ago for one of AD's competitors. Given that you're self-identified as a software engineer / electronics novice, save yourself some trouble and copy their entire evaluation board design, as closely as possible. That's what it's for: to help you succeed with this product.

Here are a couple of key points to help make sense of their evaluation board design:

Their evaluation board is 4 layers. I'm guessing the copper clad is 1.5oz or 2oz because this is a power supply. (1oz copper has sheet resistance approx. 0.002ohm per square, so thicker copper and wider traces give lower impedance connections.)

Layer 1 is power components (which are all surface-mount), with small islands of high current mesh between components.

Component placement tries to minimize the area of both the charging current loop (CIN - VIN - SW - L - COUT) and the discharge current loop (D - L - COUT), and keeping the high current mesh loops on layer 1.

Even though ceramic capacitors generally have very low ESR (effective series resistance), putting multiple capacitors in parallel is common practice to reduce ESR, improving transient voltage response. This is especially important if the load is an FPGA or a fast CPU, because a sufficiently fast high-current demand is fed by these capacitors before the regulator begins to respond. Too much current load too fast, will cause the output voltage to momentarily "brown out", which in turn may lead to erratic unreliable behavior. See figure 13. More output cap helps reduce those transient spikes.

The output capacitors are connected together with 6 vias at each end (because vias are inductive), and VOUT plane is on PCB layer 1, 3, and 4 to get the connection impedance as low as practical. The extra copper area also helps conduct unwanted heat away from the components.

Layer 2 is groundplane, with no traces. The only breaks in layer 2 are the annular rings of the vias.

Layer 3 is mostly VIN plane, with small power planes for GND and SW. The small power plane for VOUT connects the COUT capacitors.

Layer 4 is other power planes. Note the trace that runs from one of the VOUT vias to the feedback resistor divider. This is like a "Kelvin sense" trace that regulates the output voltage at that via. If the load were far away you might have to worry about remote sensing, but if it's all on the same board then it's fine to sense at the VOUT capacitor nearest the load.

Since you're probably putting this power regulator on the same board as the load, don't allow other unrelated traces to route though this part of the layout. Treat this layout as an opaque "brick" that owns that square inch of board space, on all layers.

Component selection is important. More than just the values shown on the schematic. If at all possible, try to use exactly the same components they used.

The inductor (L1) is used like a "bucket" that is charged and discharged with energy during each cycle, so L1's energy storage is the key parameter (0.5 x inductance x current squared, often just specified in data sheets as LI^2), next to its series resistance (the lower the better), and finally its actual inductance. Self-resonant frequency must be higher than the 700kHz switching frequency, otherwise it won't behave like an inductor. Be sure to look at the photo in figure 1: your L1 inductor should look generally the same.

The feedback node (FB pin, and the connection between R3 and R5) is a high-impedance input that controls the output voltage. This node must be kept very small area and low inductance, and shielded from magnetic field EMF interference. On their eval board, AD placed R3 and R5 right next to pin 5. Also note they used a zero-ohm resistor instead of a 0.1inch jumper.

Don't overlook the boost capacitor CBST. This is the "flying capacitor" of a charge pump that makes a higher-voltage power rail that is needed to drive the internal switch. This should be near U1.

Plan on using an oscilloscope to help validate your next prototype. Even though the output is meant to be constant, there's more going on inside a switching power supply regulator than with the more common linear regulator. AD's evaluation board user guide has a good write-up of what to measure, what the waveforms should look like in different operating modes, and even how to minimize the ground inductance of the oscilloscope probe.

Best of luck to you...

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