Analog Devices has an evaluation board for this ADP2303 3A step-down switch-mode power supply. Even if you don't have the actual board, the user guide is worth reading (http://analog.com/static/imported-files/user_guides/UG-189.pdf). This type of product and its PCB layout are generally similar to products I've done years ago for one of AD's competitors. Given that you're self-identified as a software engineer / electronics novice, save yourself some trouble and copy their entire evaluation board design, as closely as possible. That's what it's for: to help you succeed with this product.
Here are a couple of key points to help make sense of their evaluation board design:
Their evaluation board is 4 layers. I'm guessing the copper clad is 1.5oz or 2oz because this is a power supply. (1oz copper has sheet resistance approx. 0.002ohm per square, so thicker copper and wider traces give lower impedance connections.)
Layer 1 is power components (which are all surface-mount), with small islands of high current mesh between components.
Component placement tries to minimize the area of both the charging current loop (CIN - VIN - SW - L - COUT) and the discharge current loop (D - L - COUT), and keeping the high current mesh loops on layer 1.
Even though ceramic capacitors generally have very low ESR (effective series resistance), putting multiple capacitors in parallel is common practice to reduce ESR, improving transient voltage response. This is especially important if the load is an FPGA or a fast CPU, because a sufficiently fast high-current demand is fed by these capacitors before the regulator begins to respond. Too much current load too fast, will cause the output voltage to momentarily "brown out", which in turn may lead to erratic unreliable behavior. See figure 13. More output cap helps reduce those transient spikes.
The output capacitors are connected together with 6 vias at each end (because vias are inductive), and VOUT plane is on PCB layer 1, 3, and 4 to get the connection impedance as low as practical. The extra copper area also helps conduct unwanted heat away from the components.
Layer 2 is groundplane, with no traces. The only breaks in layer 2 are the annular rings of the vias.
Layer 3 is mostly VIN plane, with small power planes for GND and SW. The small power plane for VOUT connects the COUT capacitors.
Layer 4 is other power planes. Note the trace that runs from one of the VOUT vias to the feedback resistor divider. This is like a "Kelvin sense" trace that regulates the output voltage at that via. If the load were far away you might have to worry about remote sensing, but if it's all on the same board then it's fine to sense at the VOUT capacitor nearest the load.
Since you're probably putting this power regulator on the same board as the load, don't allow other unrelated traces to route though this part of the layout. Treat this layout as an opaque "brick" that owns that square inch of board space, on all layers.
Component selection is important. More than just the values shown on the schematic. If at all possible, try to use exactly the same components they used.
The inductor (L1) is used like a "bucket" that is charged and discharged with energy during each cycle, so L1's energy storage is the key parameter (0.5 x inductance x current squared, often just specified in data sheets as LI^2), next to its series resistance (the lower the better), and finally its actual inductance. Self-resonant frequency must be higher than the 700kHz switching frequency, otherwise it won't behave like an inductor. Be sure to look at the photo in figure 1: your L1 inductor should look generally the same.
The feedback node (FB pin, and the connection between R3 and R5) is a high-impedance input that controls the output voltage. This node must be kept very small area and low inductance, and shielded from magnetic field EMF interference. On their eval board, AD placed R3 and R5 right next to pin 5. Also note they used a zero-ohm resistor instead of a 0.1inch jumper.
Don't overlook the boost capacitor CBST. This is the "flying capacitor" of a charge pump that makes a higher-voltage power rail that is needed to drive the internal switch. This should be near U1.
Plan on using an oscilloscope to help validate your next prototype. Even though the output is meant to be constant, there's more going on inside a switching power supply regulator than with the more common linear regulator. AD's evaluation board user guide has a good write-up of what to measure, what the waveforms should look like in different operating modes, and even how to minimize the ground inductance of the oscilloscope probe.
Best of luck to you...