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I would like to know why my PIC which when I put in to deep sleep does consume more than what is specified by the datasheet. I have connected a precision current meter and found that when I load the code which makes the controller to enter deep sleep it consumes 0.27mA as to the 860nA rating given. I would like to have your insight for the problem. I have done the testing on a PCB with crystal for 16 MHz and for RTCC. Why is it showing this much consumption?

// PIC18F26J50 Configuration Bit Settings

#include <p18F26J50.h>

// CONFIG1L
#pragma config WDTEN = OFF      // Watchdog Timer (Disabled - Controlled by SWDTEN bit)
#pragma config PLLDIV = 1       // PLL Prescaler Selection bits (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config STVREN = ON      // Stack Overflow/Underflow Reset  (Enabled)
#pragma config XINST = OFF       // Extended Instruction Set (Enabled)

// CONFIG1H
#pragma config CPUDIV = OSC1    // CPU System Clock Postscaler (No CPU system clock divide)
#pragma config CP0 = OFF        // Code Protect (Program memory is not code-protected)

// CONFIG2L
#pragma config OSC = ECPLL      // Oscillator (EC+PLL (CLKO-RA6), USB-EC+PLL)
#pragma config T1DIG = ON       // T1OSCEN Enforcement (Secondary Oscillator clock source may be selected)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator (High-power operation)
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON        // Internal External Oscillator Switch Over Mode (Enabled)

// CONFIG2H
#pragma config WDTPS = 32768    // Watchdog Postscaler (1:32768)

// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = ON     // Deep Sleep BOR (Enabled)
#pragma config DSWDTEN = ON     // Deep Sleep Watchdog Timer (Enabled)
#pragma config DSWDTPS = G2     // Deep Sleep Watchdog Postscaler (1:2,147,483,648 (25.7 days))

// CONFIG3H
#pragma config IOL1WAY = ON     // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)

// CONFIG4L
#pragma config WPFP = PAGE_63   // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 63)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select (valid when WPDIS = 0) (Page WPFP<5:0> through Configuration Words erase/write protected)
#pragma config WPCFG = OFF      // Write/Erase Protect Configuration Region (Configuration Words page not erase/write-protected)

// CONFIG4H
#pragma config WPDIS = OFF      // Write Protect Disable bit (WPFP<5:0>/WPEND region ignored)






        #include<p18F26J50.h>
        #include"delays.h"


                void main (void)

{


                    int x;

                    TRISC=0x00;
                    PORTCbits.RC2=1;
                    Delay10KTCYx(20);



                    WDTCONbits.REGSLP = 1;                                                          //PERIPHERAL INT DISABLE
                    OSCCONbits.IDLEN = 0;
                    INTCONbits.GIE=0;

                    PORTCbits.RC2=0;
                    DSCONHbits.DSEN=1;

                    Sleep();

                    x=0;

                while(1)
        {
         ;
        }


    }``
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  • 1
    \$\begingroup\$ With sleep modes you need to be careful to shut down peripherals you're not using and put all the pins in a state where they drawn the least current. It might be worth trying to post the minimum code that causes it to happen. \$\endgroup\$ – PeterJ Jun 17 '14 at 1:48
  • \$\begingroup\$ @PeterJ i have included the code.in that i have put the TRISC as in output state.But it is not enabled to output as it enters deep sleep. \$\endgroup\$ – Rookie91 Jun 17 '14 at 1:58
  • \$\begingroup\$ Put the schematic snapshot. When code is proper...You may could have left few IO or input pins without termination or some of the devices are taking lot of current (in uA's) in disable mode like LDO's, buffers etc....I have seen same case in atmel xmega controllers board. Conclusion is few pins were left without termination, Bad LDO(40uA current when EN is LOW) \$\endgroup\$ – user19579 Jun 17 '14 at 6:06
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I have found the answer, it was a mistake from my side. In the above code I have enabled the TRISC as output. That is the reason for .278 mA consumption shown there. If you configure TRISC as input, the consumption would end up with few tens of uA.

And if you do nothing other than deep sleep mode and remove the Port configuration code, the consumption would drop down to 80nA respectively.

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