# Measurement and characterization of a non-linear capacitance

### Background

I am studying a device that is a non-linear capacitance. In fact, structurally it is two parallel plates with a charged fluid in between the plates. The charged species of the fluid can move around within the cell according to the applied voltage and in doing so affect the capacitance of the system.

In other words, the capacitance of the system has some diagnostic ability, in that the capacitance is an indirect measure of the location of charged species within the cell.

Various components of the fluid react to applied electric fields in different time scales and also react differently at different voltages. In fact the cell looks (electrically) like a capacitor and resistor in parallel with both the capacitor and the resistor being non-linear.

What I am interested in is seeing how the system's capacitance changes with different bias levels, changes in bias (and settling over time), edge slew rates, capacitance over frequency at fixed biases etc.

Calculations show that there should be a null at 1 -> 10 MHz (but it is not known at this point). Tests show that if you slew the system hard (high $\frac{dV}{dt}$ ) that the instantaneous capacitance is very different than slower edge rates.

All these give interesting insights into the system and also will help verify the physical model of the system.

### What I've done

I've built a system that uses $I=C\frac{dV}{dt}$ by stimulating the system with a ramp waveform (constant $\frac{dV}{dt}$ up to a max voltage, constant negative $\frac{dV}{dt}$ to a negative voltage, repeat). Of course you can increase the $\frac{dV}{dt}$ by increasing $dV$ or decreasing $dt$. When I do that the capacitance results vary.

One of the problems with the ramp technique is that the bias swings too much and it's hard to separate out the different time scales and voltage levels. It gets all mixed together.

I will be renting a LCR meter to characterize the system better to guide building my own probe setup. I will be performing sweeps of frequency from DC to 2 MHz (limited by eqt.) at various DC biases, amplitudes of probe waveform and also then measuring the R & C with a fixed high frequency as I slew the system with different $\frac{dV}{dt}$ values.

However, I do know that the the lower cost LCR's don't go to a high enough frequency (which is what I'll be renting) and that the more capable LCR's (like a SMU - source measurement unit) are far too expensive.

### Other thoughts

Using a fixed ~ 10 MHz oscillator and I/Q demodulator I should be able to generate a Sine and Cosine waveform, and then probe the system with the Sine waveform and demodulate (synchronously) the return signal to get amplitude and phase (and thus derive the complex impedance of the system). Injecting a signal into the driver should allow for the system to be probed with various (slower) waveforms.

### The design challenge

What other techniques or improvements on the above approaches can be used?

• C ~ 0.165 uF
• variance in capacitance appears to be (from testing) at most +/- 0.1 uF
• Voltage range is from -10 V to +10 V
• Response times of the system are ~ from 400 ns to 250 ms (for settling)
• Inductance is very minor and need not be considered.
• Measurement of C and R is important

I'm sure there is a clever solution out there.

• How much does C vary around the nominal 0.165 uF value? Are you expecting 10 ppm changes or +/- 50%? – The Photon Jun 20 '14 at 17:26
• Can you rent something like an Agilent 4294A? They sell for about \$50K. home.agilent.com/en/pd-1000000858%3Aepsg%3Apro-pn-4294A/… – Spehro Pefhany Jun 20 '14 at 17:52
• @SpehroPefhany See the comment on the SMU above. However, if that was the case I would have posted on TEstEQTRentals.SE, ;). I really do what to see a design solution – placeholder Jun 20 '14 at 18:26

Okay, conceptually this is pretty easy, as I think you know.

A DDS chip from AD with sin/cos outputs, appropriate low pass filter, buffer amplifier. Apply a voltage much less than the bias voltage (but high enough to get good SNR) to the sample and measure the current multiplied by the sin and by the cos, low-pass filter the two results and calculate the real and imaginary components of the impedance from the (measured) voltage and (measured) current levels.

You should be able to add the bias voltage in the buffer amplifier, but you might want to capacitively couple the current input to keep the dynamic range of the mixer reasonable.

At 10MHz most precision analog multipliers are running out of steam, so I'd look at Gilbert cell mixers. Unfortunately the low-frequency and DC performance is seldom well specified.

Of course you could simply digitize the data at hundreds of MHz and digitally demodulate it with a fast FPGA, but that would be even more of a project.

The impedance of 0.156uF at 10MHz is only about 0.1 ohm, so the buffer should be able to handle tens of mA at 10MHz and your signal chain has to be happy with ~1mV total signal.

If you have access to a "lock-in amplifier" (the rack mount instrument), look at that to replace a chunk of the work. Same if you have a function generator with quadrature outputs.

I did something similar to characterize magnetic samples (there were some very special requirements) but the frequency had to be as close to DC as possible, so it was simply measured at low swept frequencies and curve-fit extrapolated to even lower frequencies (where there would be no SNR left).

It's not clear to me whether your model is primarily a series R-C or parallel R-C, of course the general measurement of Z gives you a complex number which could be applied to either model.

Your project also reminds me of some interesting work I did on conductivity cell measurements for dialysis water treatment. There were some heuristics involved.