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I am unable to understand the working of the below circuit and how it act as amplifier.

  1. Enable the SAEN signal i.e. turning it high.
  2. Let us assume that we get DL as 1 and DLB as 0. Actually it will be (Vprec+deltaV) and (Vprec-deltaV)
  3. Now the A nMOS is conducting and we will get both pMOS gate as Logic 0.
  4. This will make both nodes at A and B as 'Strong +".

What will be the level at A as the pull up pMOS will pull it up and pull down nMOS will put it down. And what is the use of the current mirror? And how does it amplify?

Current Mirror Sense Amplifier

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  • \$\begingroup\$ Looks like a linear differential amplifier to me, where SAEN might be connected as a current mirror rather than a switch that is high or low. Then it provides a tail current to the diff pair, which outputs an analog voltage that is the gain*(Vdifferential). \$\endgroup\$
    – John D
    Jun 26 '14 at 14:56
  • \$\begingroup\$ @JohnD Can you share more info on the working of the circuit or any link explaining the same. I want to understand the working and NOT on the basis of derivations, but rather on MOS model. \$\endgroup\$ Jun 27 '14 at 18:04
  • \$\begingroup\$ Sure, here's one link I found: elin.ttu.ee/mesel/Study/Courses/Biomedel/Content/CircDesg/… and you can Google CMOS differential amplifier for many more. \$\endgroup\$
    – John D
    Jun 27 '14 at 21:38
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Current mirror is the circuit which tries to drive same current at the output as in the input. Here, DOUT is connected to the gate terminals of both the PMOS transistor P1 & P2 and it turns ON the transistors (because DOUT=0). Current flowing in P2 is same as current flowing in P1 (I1=I2) if the W/L ratio's of both the transistor are same. If W/L ratio of transistor P2 is α times the W/L ratio of P1, then I2=αI1. And we will get the amplified output current at the DOUT_B.

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