As in the title. I've noticed several PCBs of mine have vias which are not plated - they do not have a characteristic "gold" shine to them. I suspect this is because I was pushing the limits of drill sizes - my fab specifies 12 mil and I used 15 mil (20 mil including plating.) I've checked a few with a multimeter and they do have continuity, which is good, but I've only checked a few, so have no idea if there might be a few dodgy connections because of this. Is it something to be concerned about? Board passes DRC as specified by fab.

I've seen quite a few high density boards like motherboards and graphics cards without plated vias.

Here's an older board of mine which shows a similar problem to my newer boards. Note that some vias look gold, while others don't look plated at all.

enter image description here

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    \$\begingroup\$ Wait - Your fab can do 12 mil vias, but you used 15 mil? That should be easier. Also, can you upload a picture? If the holes aren't plated through, you won't have continuity. Are you saying that they're missing an annular ring? Confused... \$\endgroup\$ – Kevin Vermeer Mar 19 '11 at 22:10
  • \$\begingroup\$ @reemrevnivek. I'll upload a pic later, my camera sucks for macro. I think the problem is the lack of annual ring on both sides of the board - the vias look otherwise identical to any other copper. \$\endgroup\$ – Thomas O Mar 19 '11 at 22:32
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    \$\begingroup\$ It's a bad picture, but it looks to me like you've accidentally tented your Vias. Check your gerbers, I bet your solder mask layer covers the vias. Your boards are fine. \$\endgroup\$ – Zuph Mar 21 '11 at 1:31
  • \$\begingroup\$ @Zuph, if the etch mask registration is bad enough (looks borderline in the picture) and not covering the via entirely, the enchant can work its way into the via and eat it out. \$\endgroup\$ – Nick T Mar 21 '11 at 5:31
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    \$\begingroup\$ vias are always plated. When you take a copper clad board and drill holes in it, they won't conduct between the sides. Plating is used to put metal into them, forming a conductive path between both sides of the board. Later, depending on the process that is specified, the fab house will put some finish on the exposed copper, ENIG, HASL, etc. \$\endgroup\$ – Nick T Mar 21 '11 at 5:36

I Think you are using the term plating incorrectly. Plating will decrease the diameter of the hole, not increase it.

The larger dimension (the pad surrounding the via hole) is called the Annular Ring.
All the fabs I have worked with generally want a 0.005" per-side annular ring, or the via diameter + 0.010".

You definitely have some really hairy registration issues on the board you posted pics of. It may work, but you're really pushing it.

Generally, you never want the via hole to break out through the edge of the annular ring, which is happening a few times in the picture you posted.

Anyways, Registration refers to the accuracy between a fab-house's etching and drilling process.
Basically, if a fab house etches a circle in the coper of a board, and then drills a hole in the middle of the circle, how close is the drilled hole to the center of the copper circle?

Remember, drilling a board and etching it are separate processes, and involve the board being unmounted and remounted in different equipment.
Generally, you can get as good registration as you are willing to pay for, and it looks like your boards are from a pretty budget board-house.

You need to allow enough annular ring that you never wind up with the via hole too close to the edge of the pad. This is generally specified by the fab house (they should have a minimum annular ring spec on their board requirements). However, it is important to remember that they may run your boards anyways, even if it does not meet their minimum required specs.

The board house may run the boards anyways, and just refuse to fix any issues if they don't work out.
This is particularly common in China, where the general philosophy seems to be "Let the Buyer Beware".

Anyways, I think the reason you are finding your vias a bit odd looking is that you have tented your vias, which is the practice of covering the annular ring and the hole for the via with soldermask.

With 0.015" vias, you will occasionally get a contiguous layer of soldermask over the hole, and they will look different.

enter image description here

  • \$\begingroup\$ It was only $40 for 10 boards. Registration error specified as 0.09mm. seeedstudio.com/depot/… \$\endgroup\$ – Thomas O Mar 21 '11 at 7:51
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    \$\begingroup\$ Self-evidently, it sounds like the chinese PCB house is fudging their numbers. \$\endgroup\$ – Connor Wolf Mar 21 '11 at 8:26
  • \$\begingroup\$ Yes, it appears that every hole is plated correctly. They tented some vias (completely covered and filled the hole with green soldermask), which is also fine -- the metal is shiny under the soldermask. Go ahead and put parts on the board -- the mis-registration appears to be (just barely) small enough not to hurt anything, so it will probably work fine. \$\endgroup\$ – davidcary Mar 22 '11 at 17:58
  • \$\begingroup\$ Interesting that a new board I got is fine. Almost zero registration error. And I used smaller vias @ 14 mil. \$\endgroup\$ – Thomas O Mar 28 '11 at 22:35
  • \$\begingroup\$ I've discovered how to get rid of my tented vias in gEDA/PCB, using ctrl-k, which is good, so I'll see if my latest boards are any better. \$\endgroup\$ – Thomas O Mar 28 '11 at 23:00

Get your boards tested. It costs a bit more, but it's worth it.

You won't be able to see the plating inside the vias unless you use a microscope. Hi-tech boards like motherboards and graphics cards always use PTH.

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    \$\begingroup\$ 5/10 are tested by fab according to netlist (generated from gerber), but who knows, they were dirt cheap, they could have skimped. \$\endgroup\$ – Thomas O Mar 19 '11 at 22:01

You won't be able to see the plating inside the hole without a microscope or some other really good magnification. If you're talking about the annular ring outside of the via hole-- Check your gerbers. You might have specified solder mask right up to the hole.

If a few of them test good, they're probably all good, especially at 15 mils (vs. the 12 mil lower limit of the fab). Of course, if this is a really critical board, you should have paid for 100% E-testing ;-)


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