I'm having issues calculating the power losses associated with the operation of a bidirectional isolated dual active bridge DC/DC converter. The converter is controlled using phase shift modulation (PSM.) The converter is shown below. There are 4 "switches" on each bridge (switch here meaning a parallel combination of MOSFET, anti-parallel diode and capacitor.)

Dual Active Bridge Converter

The switching cycle can be broken into 4 main intervals, not accounting for transitions between these intervals. During each of these 4 intervals, two MOSFETs on each of the bridges conduct. During the transitions between intervals, certain capacitors and diodes also conduct. In order to illustrate the logic behind this, the following diagrams and tables are provided. N.B. The circuit diagrams are incomplete, however, the remaining circuits which have been omitted follow the same trend indicated by the diagrams given.

Switching Cycle Circuit Diagrams:

Incomplete Switching Cycle Circuits

Current and Voltage During Intervals:

Inductor Current and Transformer Voltages

My goal is to calculate the power losses in the converter during a switching cycle.

I am aiming for my total losses figure to include core losses, conduction losses of diodes and MOSFET and switching losses. In relation to switching, zero voltage switching can occur under certain conditions, in which case the switching losses for the switching question will be given as zero.

Now for my question:

The plot of current and voltages above only shows periods where the MOSFET are conducting. In this ideal case, I understand that conduction loss would simply be the square of the RMS current by the resistance of the MOSFET in question. My issue relates to the period of time for which the diodes and capacitors conduct during the transition period between intervals. In order to calculate the conduction losses in the diodes, I will need to identify this time period.

Can somebody explain how to calculate the losses in the devices during these transient periods?

  • 1
    \$\begingroup\$ That's an excellent first post. Congratulations! +1 \$\endgroup\$
    – Ricardo
    Jul 2, 2014 at 19:15
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    \$\begingroup\$ I'd use a simulation tool and fiddle around with values to get a feel for what the losses are - if you are trying to design something real then this will be the best approach. If it's some kind of homework you didn't say. \$\endgroup\$
    – Andy aka
    Jul 2, 2014 at 19:38

2 Answers 2


I suggest you determine load condition you want to evaluate efficiency (losses) as ZVS operation depends on the phase shift which effects the RDson. Ony one leg with see ZVC - the other may or may not see ZCS.

Regarding RDson - I always assume the junction to be at 100C so the RDson is 2x the stated spec at 25C.

I assume you are controlling the output stage as a synchronous rectifier - correct? If so then you can simply use the RDson for those FETS but if not then the loss is much higher as the body diode is in play (Vdrop*I).

Hope that helps somewhat.


First of all, don’t neglect iron and AC copper losses in the transformer as they can be huge in this kind of structure if running to several 100s of kHz.

Back to the problem, you've got to take into account the dead time that you will apply as well as the parasitic capacitance of your MOS. As long as the capacitors are not empty, they block the diode and divert the current into themselves. Then the diodes commute and conduct.


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