I'm finishing up a PCB layout which contains a 6.5 GHz ultra-wideband transceiver with a chip antenna, an ARM controller running at 72 MHz with a 12 MHz crystal, a 16 MHz SPI bus with 3 peripheral components, USB communications, and a buck converter.
Handling the EMI and decoupling considerations has been a real learning experience :) I've used good design practices, as I understand them. I have only one more question before shipping off this design.
I am generally placing decoupling caps like so (this is an 0402 cap):
The vias are going to internal ground and power planes.
For additional shielding, I want to do a selective flood fill on the top and bottom layers of the (4-layer) PCB and stitch them to the ground plane. I wasn't planning to allow this fill to connect to the pads of the decoupling caps.
My question: should I allow thermals to connect to the ground vias, even though the decoupling should already be sufficient? Or is it preferred to keep them isolated? Here is an example of connecting the vias to the top fill: