I have a board with 2 Virtex 6 FPGAs, which are connected to each other through 64 parallel IO lines that can operate up to 400 MHz. One FPGA, let's call it B, also has 2 GB of DDR3 memory connected to it. I also need high speed access to this memory on FPGA A (which doesn't have any DDR3 connected to it). Eventually, the plan is to cache stuff in BRAM on FPGA B and transfer it over to FPGA A.
So, I'm trying to design a high speed interface between the two FPGAs to do just this, but I don't know where to start. I am thinking of FIFOs to buffer the address and data request.
Do you know of any interfaces/protocols that would fit my application? If you can direct me to any papers, that would be great as well.