I use a constant current SEPIC boost regulator ([TI LM3410X) to run a 8.5V 400mA OLED panel from a single Cell Lithium polymer battery. I have noticed that the input voltage ripple is too much (~1V peak) when using a digital PWM signal on the DIM pin of the regulator that in-effect gates the regulator's 1.6 MHZ OSC on and off. NO issues what so ever when the OLED is at its brightest (i.e. DIM pin is HI, or always on). The design is validated with TI's Workbench tools.
I have input low ESR MLCC caps and played with the value (up to 80 uF) and the regulator's output cap but not much improvement in input voltage ripple when the PWM signal does a low to high transition. Layout is clean and tight with a solid GND plane.
To me this seems to be a fundamental issue with digital PWM dimming methods where the inrush requirements can be large every time the PWM signal makes a rising edge and enables the regulator's OSC, isn't it?
What are the remedies besides playing with input inrush storage cap and output cap of the regulator?