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Are there any layout requirements/special considerations when routing traces on top and bottom layers of a double sided PCB, e.g. angle between traces, can traces pass beneath an IC, etc?

I know that ground/signal planes should have the same boundaries on top and bottom in order to avoid unwanted capacitances which may add noise. But are there similar restriction to the traces?

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It depends on the speed of your signals. Signals with really fast edges or high frequencies have different requirements. You'll need to treat them as transmission lines and control the impedance and length and everything. For slower signals, a good rule of thumb is to try to route one layer horizontally and the other vertically to reduce noise coupling like you mentioned in planes. You can also try to route all of your signals on the top layer and flood fill the bottom layer with ground copper. That will help decouple your signals and give you some extra parallel capacitance (which is a good thing). Don't be afraid to use multiple vias on the same trace if you expect higher current there. Try to avoid vias under ICs unless they're tented because you can accidentally short an IC pin to an exposed via when soldering and you won't be able to tell.

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  • \$\begingroup\$ From what frequencies should I start to worry about trace impedance? \$\endgroup\$ – joaocandre Jul 15 '14 at 15:57
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    \$\begingroup\$ @joaocandre I asked a similar question here, and got some good answers. \$\endgroup\$ – bitsmack Jul 15 '14 at 17:22

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