I read an application-note that says the heat-sink (when not electrically isolated), is one of major source of EMI. Well I think this can be corrected at some point by good EMI filters and a good case to prevent EMI/RFI.

But what about stray inductance and capacitance?

This presuming that:

  • IGBTs, with the case electrically common to the collector.
  • Individual heat sink for each IGBT.


  • Although EMI is a concern, as my question states, my concern too is to add stray inductance / capacitance to the circuit, increase the miller effect (even thought the IGBTs are being driven with negative gate bias, etc).

  • It does not need to meet Class A emissions, so at some point the EMI can be reduced to acceptable levels with good case and line filtering.

  • \$\begingroup\$ As in all things, it very much depends. What are the edge rates? what is the signal? current mode or voltage mode, what are the spacings of the heat sink to the ground plane etc. etc. I can certainly envision (and have built) heat sinks that acted as faraday cages. Can you give Specifics of your problem? perhaps a isolated heat sink is the answer, perhaps not. Layout and placement will matter. \$\endgroup\$ – placeholder Jul 15 '14 at 20:29
  • \$\begingroup\$ @DiegoCNascimento When you say that you were reading an application note, please provide a link to that application note. It would give a better idea about the context. \$\endgroup\$ – Nick Alexeev Jul 15 '14 at 21:40
  • \$\begingroup\$ @NickAlexeev Of course, I just don't remember the application-note reference :) \$\endgroup\$ – Diego C Nascimento Jul 15 '14 at 22:10

If you have a heat sink flailing around with hundreds of KHz square waves on it at hundreds of volts, you've got an EMI source. Since usually the drain of a MOSFET is common with the heatsink when not isolated, that's typically going to maximize the pain.

If the case is quite conductive, capacitive coupling to the outside world can be minimized but there will still be some circulating currents to deal with internally.

Magnetic coupling isn't usually a big problem with good design (minimize loop area in current-carrying loops).

Good thermal coupling, low noise, and isolation tend to be at cross-purposes.


Usually connecting these directly to the case makes for a difficult manufacturing process and stand alone heat sinks are used. These are easier to isolate with EMI absorbing material if needed when doing your FCC Class B testing.

If you are grounding directly to the case, you want to be careful not to introduce ground loops between the fets and the circuit board these can generate strong EMI signals. If you find they are a problem then you might have to play around with the grounding to the case to reduce some of the EMI. This can be done by isolating (electrically) some of the contact points, changing the location of the ground contact points, or adding series ferrite beads to reduce any higher frequency ground loops.

However if you get lucky it will pass without having to play shielding or filtering games.

  • \$\begingroup\$ Thanks. EMI requirements are not so high, and the "case" (of the inverter) can be, and probably be, grounded. The heat sinks you see are "stand alone" (two in this case) if they are cut between the two IGBTs they are isolated from each other. The figure you see is for electrically isolated, but at full load they will get near at the max junction temperature, so I will use a ~105°C protection or near that. Without being isolated, from simulations it don't go over ~100°C at full load. (Not to consider peak load). \$\endgroup\$ – Diego C Nascimento Jul 16 '14 at 22:23
  • \$\begingroup\$ My concern is getting a longer switching times, pronounced miller effect, and trading the "safe" of isolated ones, for more dissipation (in the IGBTs) or even problems in switching related to this. \$\endgroup\$ – Diego C Nascimento Jul 16 '14 at 22:25

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