I have what I believe is a working buck converter design centered around the LM3485. It's intended to be a Raspberry Pi power supply.

The schematic is at Pi Power schematic, which I copy below.

Pi Power schematic

(note that in the image there are two errors: L1 is 15 µH instead of 33, and the MOSFET is a Si3443CDV in the latest version).

The parts selection came largely from an online TI design tool. I changed some of the values for availability and cost, and the resulting circuit seems to perform well on the bench.

But since I have some time before the first production boards come back, I've been going over and over the design with a fine toothed comb, and the one thing I can't quite work out is the selection of \$R_{adj}\$ - the current limiter comparator resistor.

According to the datasheet, the comparator compares \$V_{isense}\$ with \$V_{adj}\$, and when \$V_{isense}\$ is lower, it triggers the over-current shutdown.

Well, \$V_{isense}\$ is the voltage drop across a sense resistor, which for this design is 25 mΩ. The maximum rated current for the design is 2 amps, and the datasheet says the peak amps is \$(I_{max} + I_{ripple}) \times 1.1\$, and that for currents over 2 amps, \$I_{ripple} \le I_{out} \times 0.3\$.

On the \$R_{adj}\$ side, there is a calibrated 3.0 µA current sink that's connected on the opposite side of \$R_{adj}\$ from \$V_{in}\$.

Put it all together and the current limit should be

$$R_{adj} \times .000003 = I_{max} \times .025$$


$$R_{adj} = \frac{I_{max} \times .025}{.000003}$$

For an \$I_{max}\$ of 2.53A ( \$= 2.3 \times 1.1\$), \$R_{adj} = 22k\$ (roughly).

So why did TI's design software recommend 39k?

I have to assume TI is smarter than I am. What did I miss?

  • \$\begingroup\$ Go for it. Sorry. Too many cooks. :) \$\endgroup\$ – nsayer Jul 18 '14 at 2:24
  • \$\begingroup\$ There! See if you like it this way - also check for errors, please. \$\endgroup\$ – Ricardo Jul 18 '14 at 2:26
  • 1
    \$\begingroup\$ Looks great! Thanks. I'll have to look at how that syntax is done. \$\endgroup\$ – nsayer Jul 18 '14 at 2:41
  • \$\begingroup\$ Question, why are you using a sync-fet for your top-gate? \$\endgroup\$ – Funkyguy Jul 18 '14 at 2:56
  • \$\begingroup\$ I guess I don't know what a sync-fet is. I picked it by basically searching through DigiKey. I went for the cheapest part that would meet the current and thermal requirements. \$\endgroup\$ – nsayer Jul 18 '14 at 3:07

So I finally got around to actually testing this. It turns out that the current protection kicks in at around 4.25 amps with a 39 kΩ resistor. That squares with my calculations more than it does TI's.

I'm not sure at this point whether I want to leave the protection that high (the circuit is rated for only 2A) to accommodate surge capacity or reduce it. But that's another question for another day.


Your calculations look good... It is possible that the ripple will be more than 30% in your particular configuration and the design tool is accounting for that. Can you provide more detail - e.g. a screen capture of the TI design tool that gave you the values? What is your VIN?

Also note that the current out of the ADJ pin hardly qualifies as calibrated. 3.0uA is the minimum value but it could be as high as 7uA! Hopefully you are not depending on a precise current limit...

  • \$\begingroup\$ The data sheet says to use 3µA for the calculations to avoid false tripping. The current limit function in my design is merely protective, so precision isn't a big issue. Perhaps TI is erring high to preserve the specified output? If so, it's QUITE generous to nearly double the calculated value. Vin is anywhere between 6 and 15 volts. I don't have a capture of TI's design, but apart from a different MOSFET (which I would assume wouldn't impact the current limiting), it's largely the same (to the nearest standard values). \$\endgroup\$ – nsayer Jul 22 '14 at 0:29
  • \$\begingroup\$ Yeah, that's a serious sandbag, but who knows. The only other thing I can think of is they might have assumed you were current sensing over both the resistor and the FET rdson, which would require a higher trip point reference.... \$\endgroup\$ – user49628 Jul 22 '14 at 1:07
  • \$\begingroup\$ Them thinking that it was measuring across both Rds(on) and the resistor wouldn't match up with the schematic, though. Unless they made a mistake (that is, I really am smarter than TI :) ). \$\endgroup\$ – nsayer Jul 22 '14 at 5:06

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