I'm trying to optimize the layout of a MAX1979 TEC driver on a double sided PCB. Is the placement of single, small traces in the middle of a ground place, as seen below on the bottom side of the susceptible to suffer from ground loops around it? It should also be noted that the IC is placed on a bridge between power and analog grounds, and I have doubts if the small traces will induce noise in the analog part.

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  • \$\begingroup\$ You mean the trace near C12? I wouldn't worry at all about ground loops. But if there are fast signals going over the cut in the ground plane, then I would ask how far the ground return current have to travel to get around the break. In your pcb this looks short... and they may not even be fast signal lines. \$\endgroup\$ – George Herold Jul 18 '14 at 15:08
  • \$\begingroup\$ @GeorgeHerold I assume the return path is just around the vias, which is at best 1/10 of the trace length. They're not fast signals, one is an analog input and the other the supply rail. By my concern is really more on the trace near C6, placed over the bridge between noisy and analog areas of my ground plane. \$\endgroup\$ – joaocandre Jul 18 '14 at 15:20
  • \$\begingroup\$ I'm not a signal integrity expert but this could help: Is there any signal over 10MHz with a break underneath it? If so, is the loop around the break more then 1/20th the signal's wave length? \$\endgroup\$ – Evan Jul 18 '14 at 16:17

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