# What is the difference between registers, flip flops and latches?

I want the answer to the very basic level. I know what they mean individually, but what I am looking for is connection between them.

• I have a shelf full of first year electronics text books (publisher samples - all different. Half are instructor's editions). You can have one for postage. Commented Jul 30, 2014 at 17:25
• More like a big bookcase full. Commented Jul 30, 2014 at 17:25
• @C.TowneSpringer I'll take one...if postage isn't outrageous Commented Jul 30, 2014 at 17:44
• 3 years in and haven't had a digital electronics course? Commented Jul 30, 2014 at 17:48
• I don't understand the votes to close as "too broad". I thought I provided a rather concise (and correct) answer (and yes, some of the votes came after my answer was posted). Commented Jul 30, 2014 at 18:24

Flip-flops are single bit devices with two stable states. The outputs are typically Q and $$\\mathsf{\small \overline{\text{Q}}} \$$. There are several kinds, here are probably the most common:

SR flops have two inputs, S (Set) and R (Reset). As they name implies, asserting either of these either sets or resets the flip-flop. After the input is de-asserted, the flip-flip retains it state. The inputs are usually negated, $$\\mathsf{\small \overline{\text{S}}} \$$ and $$\\mathsf{\small \overline{\text{R}}} \$$, i.e. 0 is the asserted state.

J-K flip-flops are similar to SR flip-flops, (with J being Set and K being Reset), but they have a third property -- if both J and K are set, then the flip-flop toggles.

D flips have a clock input, and when this clock rises (or falls, depending on the type), the D input is clocked into the flip-flop. Most D-flops also have the S and R inputs of a SR flip-flop.

Latches are the same as a flip-flop. Several latches can be combined in parallel to form a register. There will be inputs for each bit plus a clock. An 8-bit register used inside a microcontroller would hold a single byte. A 16-bit register would hold an address ranging from 0 to 65535 etc. Often a register will have a common reset lead.

Latches can also be combined in series to form a shift register, in this case there is a single input, and the output of one latch is fed into the input of the next on the rising or falling edge of a clock. The final output of the register can be used to feed into the input of another register. The shift register can also have individual inputs for each latch, so the register is both parallel and serial at the same time. This might be used for a register inside an ALU (arithmetic logic unit), that can do both arithmetic and logic operations, as well as shifting.

• So sorry, Thank you very much. I am a new user, so still learning what the symbols mean here. Your answer is the one that is correct.
– SIK
Commented Jul 30, 2014 at 17:45
• @SIK A flip-flop and a latch are the same thing. A register is simply a bunch of flip-flops connected either in parallel or serial. Commented Jul 30, 2014 at 17:50
• @21brunoh I rolled back your edit because it changed the meaning of tcrosley's words. You should have made a comment to the answer rather than changing it in this way. Commented Jan 3, 2020 at 23:15
• @ElliotAlderson roger that, I will leave that "footnote" here: The term "latch" might be used to describe an asynchronous flip-flop, whereas "flip-flop" could be used to describe a clocked flip-flop [ref]. Commented Jan 4, 2020 at 1:16

In the simplest of terms

1. Latches are the smallest building blocks of a memory

2. Flip flops are created using latches.

3. A bit holds binary data - 0 or 1, similar to a flip flop, so you may use the term flip-flop and register interchangeably.

There are various types of flip flop/latch and terminology can be a bit varied.

The simplest device is the un-clocked R/S flip flop. There are to inputs, a "set" line which when triggered makes the output go high and a "Reset" line that when triggered makes the output go low. If both inputs are inactive then the flip-flop retains it's previous state. If both inputs are active the flip-flop is driven into an invalid state.

Next simplest is the transparent latch. Rather than set and reset inputs there is a data input and an enable input. When the enable input is active data is passed from input to output. When the enable input is inactive the output retains it's previous state.

Then we have the edge triggered designs. Clocked flip flops are triggered by a clock edge. The value of the output after the clock depends on the inputs before the clock edge. The big advantage here is that we can chain the devices and signals will move from stage to stage as clock edges come in.

There are a few types. You can have a clocked version of the RS flip flop that only updates when a clock edge comes in. You can have a JK flip flop which is similar but togles on every clock edge when both inputs are active. You can have a T flip flop that toggles unconditionally on every clock edge and you can have a D flip flip with a single input that is propagated to the output on every clock edge.

In some cases clocked flip flops also have an "asynchronous reset", "asynchronous set" or even "asynchronous load" function which allows the output to be changed independent of the clock.

Normally when people say "latch" they mean "transparent latch" but they may sometimes mean "D type flip flop". Normally when people say "register" they mean a D type flip flop.

In the patois where I work, a custom logic circuit design group, the term register and flip flop are used interchangeably. We would very much disagree with equating a latch with a flip flop however. To us a flip flop is two latches in series with the one at the input being the master latch and the one at the output being the slave latch. Though data does shift from the master to the slave we do not call a flip flop a shift register but in a strict sense it is a one-bit shift register. We start using the term, shift register, when we put more than one flip flop in series. It is more common for us to call flip flops registers when we have several, either in series or in parallel and we use outputs as a parallel bus of a data. So this is using the term, register, as a memory cache for holding data.

In the attached drawing I am not using standard latch symbols or showing a clock signal as the question is not asking how a shift register works. The drawing shows four latches arranged as two flip flops in series as a 2-bit shift register with two parallel outputs.

A resistor reduces current and voltage (power).

A "flip flop", better known as a shift register, is a chip to allow you to control a number of inputs or outputs with two or three pins from your controller (arduino, etc.) A 74HC595 chip is a common example of an latching output shift register...we'll get to the latching part in a minute.

With the "flip flop", I said two or three pins on the controller. If two pins, data changes flow across all of the outputs, so "ON pin 1" becomes (flip/flops over onto) "ON pin 2", while an "OFF pin 2" flip/flops over to an "OFF pin 3) as a new on/off value is pushed into pin 1. This is where the flip flop name comes from. You can chain a number of shift registers together for virtually unlimited inputs or outputs.

Now here is where latch comes in, which is a feature of some shift register chips (flip flops.) If you are using a shift register with a LATCH, you can unlatch the chip with the third pin, push all your pin settings through the chip (they flip flop down just like before, but hidden), and then LATCH the chip. Unlike an unlatched shift register, the output pins will not change their state until the latch is latched again.

• I am so sorry , I am not asking about resistors,its registers.
– SIK
Commented Jul 30, 2014 at 17:17
• Flip-flops are not shift registers. Shift registers are made out of flip flops.
– Mike
Commented Jul 30, 2014 at 17:33
• yaa, that's the connection I am looking for.Thank you @Mike
– SIK
Commented Jul 30, 2014 at 17:41
• Did the OP say "resistors" before an edit? Or is this a mis-read? Commented Jul 30, 2014 at 21:41
• ["resistors" before an edit?] Yes. Commented Jul 31, 2014 at 13:47