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I'm using the STM32F105, in a LQFP64 package. It has two circular markings, on opposing corners of the IC. This picture is for a different ST ARM, but the markings and silkscreen are similar:

ARM

The larger mark in the upper-right of the picture has a flat bottom, whereas the smaller mark in the lower-left is slightly concave. This package doesn't have an exposed pad, so there are no clipped corners underneath.

The datasheet only mentions one mark:

diagram

and I haven't found any other package documentation that mentions it.

Does anyone have a clue for me?


Update:

The project is completed and the answers are correct. Pin 1 is the smaller, concave mark in the lower-left. Don't forget to upvote the good answers!

Interestingly, I've since purchased another batch of these chips and they only have the one mark. Thanks, all!

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  • \$\begingroup\$ My logical thought process says the Lower-Left, slightly concave mark is Pin 1. Because why would you orient the chip in Figure 43 such that it is upside-down? No hard evidence that this is correct, just what makes sense to me. \$\endgroup\$
    – Adam Head
    Aug 1 '14 at 19:56
  • \$\begingroup\$ You are right about which divot, but on the pinout diagrams they show the chip in such an orientation that if they drew the writing it would be on it's side, so you can't rely on that. \$\endgroup\$ Aug 1 '14 at 20:05
  • \$\begingroup\$ Whatever the answer, can you remember to confirm it here when you get if figured out? \$\endgroup\$ Aug 1 '14 at 20:29
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    \$\begingroup\$ If there is still some doubt in your mind, use a continuity tester to make sure all the grounds are connected, since these will likely have unique locations you should be able to verify which of the pins are connected together. For example pins 27,28 and 49,50 are a unique grouping that doesn't occur on other sides. \$\endgroup\$ Aug 1 '14 at 20:50
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    \$\begingroup\$ I have an STM32F103 installed on a working board on my desk right now. It was installed by an assembly house, presumably straight from the tape and reel or whatever packaging ST delivers it in. It is oriented consistent with the small, concave mark indicating pin 1. The other mark is, I believe, an unfortunate artifact of the package encapsulation process, and is not intended to actually be a mark. \$\endgroup\$
    – RBerteig
    Aug 1 '14 at 23:43
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I have designed a board for the STM32F103R, like you. Tested and "proven" now.

Anyway, if the text is right-side-up, pin 1 is in the lower left.

The other answers all mention things that could be considered a "hint", Luckily those hints all point in the same direction and happen to be correct.

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  • \$\begingroup\$ It would be nice if someone cited a source in ST's documentation. \$\endgroup\$
    – cp.engr
    Feb 15 '17 at 16:00
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    \$\begingroup\$ Yeah, that would be nice. But... ST considers one mark the pin-1-indicator and clearly documents that. The other is "just an artifact of the packaging", not documented anywhere. I haven't encountered 64-pin packages from ST that do NOT have the extra mark. I'm now silkscreening "ARM" on new boards in the right orientation.... \$\endgroup\$
    – user242579
    Aug 27 '17 at 14:17
  • \$\begingroup\$ "ST considers one mark the pin-1-indicator and clearly documents that." Which mark, and where is it documented? \$\endgroup\$
    – cp.engr
    Aug 27 '17 at 15:17
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    \$\begingroup\$ Haha! You made me look! :-) I expected to see it on page 24/117 of the STM32f103x8/B datasheet. But apparently they show the dot only for the 48-pin package. In the '072 that I use most often, the 48-pin package has been "corrected" to lose the pin1 indication too! Anyway, page 96 DOES document the pin1 indicator. No mention of the packaging artifact. \$\endgroup\$
    – user242579
    Oct 8 '17 at 17:07
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This is a comment - converted to an answer.

If there is still some doubt in your mind, use a continuity tester to make sure all the grounds are connected, since these will likely have unique locations you should be able to verify which of the pins are connected together. For example pins 27,28 and 49,50 are a unique grouping that doesn't occur on other sides.

enter image description here

It's very very likely that since this is a processor that the ground is common throughout the die.

Next step would be to use a diode checker and to test the power pins against group.

Use a little bit of correction fluid to the package body to mark your pin with a white (or yellow etc.) spot.

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  • \$\begingroup\$ Probing a loose chip having 0.4mm pitch leads with a meter is not a particularly good idea as it's going to be extremely difficult to do so without disturbing the alignment of the leads enough to make soldering trickier. \$\endgroup\$ Aug 2 '14 at 14:11
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    \$\begingroup\$ @ChrisStratton That's pure nonsense, just don't press so hard or press on the lead frame closer to the body. \$\endgroup\$ Aug 2 '14 at 14:13
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LQFP100 chip picture

Going by this image of the LQFP100 version of this processor, the text orientation gives the PIN1 location away (the lower left dot seems to be the pin1 identificator on your chip).

Of course, this deduction might be wrong, but I think it's far more likely that it isn't.

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  • \$\begingroup\$ I can confirm this matches my own STM32 projects in several family members. Of course the orientation of the writing is not technically reliable. If a discovery board is being used for programming, that can be another handy comparative reference. Counting from the lowest pin number, ST tends to put the clocks on the first side and the USB on the 3rd side. Note that the orientation in which the pinout is drawn on the data sheet tends to be with pin one in the UPPER left - if the chip had a label on the data sheet, it would read down the page instead of across. \$\endgroup\$ Aug 1 '14 at 19:59
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The smaller (smallest? in some cases) circle is always pin 1. In your figure, that would be the bottom-left pin.

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