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I want to generate a precise frequency in the 500MHz range, and have therefore purchased a VCO (200MHz to 400MHz).

To measure the VCO output frequency, I'm trying to build a high frequency counter up to 500MHz.

The way I have been trying to do it, is using the MC100E016 (ECL Synchronous Binary Up Counter). Take the Q6 (/64) output and feed this into my oscilloscope (and later MCU). But this seems hard to get to work, because the PECL logic sets high demands on the input.

Do you have any good and easy way to build a frequency counter, or even just a divider would be fine (my 100MHz oscilloscope can measure the output from the divider).

Or even better, generate a 200MHz to 400MHz range frequency, who's frequency can be set (digital or what ever).

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You can use several methods:

1) PLL - for example ADF4002 works up to 400 MHz. The resolution is limited, because it works by multiplying reference frequency. This chip will work with your VCO.

2) Integrated PLL synthesizer - ADF4350 can generated frequencies within 137-4400 MHz range with fairly good resolution. However, within your range the result will be more square wave rather than sine.

3) DDS - direct digital synthesis - AD9910 can generate frequencies up to 400 MHz with resolution under 1 Hz.

Trying to tune wideband VCO without any stabilization and measuring the result will not provide stable frequency.

Here is a list of PLL chips and PLL synthesizers made by ADI. Other vendors have some too, but usually working within GHz range.

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  • \$\begingroup\$ Thanks for your reply. I have also looked at the ADF4002, and was thinking about starting by using it as frequency divider, by: Feeding RF to RFin, setting the N-counter and configure the MUX output as "N-Divider output". Then I should see the divided frequency on MUX output. But if I understand you correct, the best way would be to use the CP output as tune input on the VCO? \$\endgroup\$ – JakobJ Apr 1 '11 at 12:06
  • \$\begingroup\$ @JakobJ Exactly, but of course you have to filter the output from charge pump by lowpass filter. It can be passive RC filter but it needs some care. Look into some basic PLL design literature or use free simulation tools from the vendors, like this one. \$\endgroup\$ – Jaroslav Cmunt Apr 1 '11 at 12:18

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