I made a digital input circuit to convert a 120Vac waveform into a digital 2.3V signal. I would like to add a "low-pass" filter at the output to get a low level for higher frequencies than 1kHz. I can't just use an inverter after a classic low-pass filter because I need to keep the high-low sequence for frequencies below 1kHz.

All suggestions are welcome


What I want below the cutoff frequency : enter image description here

What I want above the cutoff frequency : Output above cutoff frequency

As you know, a low-pass filter will "smooth" v(OUT) until it becomes a 2.3V DC, and that's what I want to avoid. I want my digital input to be inactive for high frequencies.

  • 3
    \$\begingroup\$ What do you expect your output signal to look like exactly? Is it DC and you are trying to filter out noise higher than 1kHz or...? \$\endgroup\$
    – ACD
    Commented Aug 7, 2014 at 14:13
  • \$\begingroup\$ So what you want is a frequency to voltage converter and a comparator at some set point equivalent to the 1kHz frequency. Then that comparator would drive a simple square wave oscillator if the output of the comparator is 1? \$\endgroup\$
    – horta
    Commented Aug 7, 2014 at 14:38
  • \$\begingroup\$ electronics.stackexchange.com/questions/116623/… See my answer there. It's a different application, but beyond the ring oscillator, you have a freq-V conversion and the comparator part of it. \$\endgroup\$
    – horta
    Commented Aug 7, 2014 at 14:49
  • \$\begingroup\$ How much delay can you accept between the digital signal and the analog signal? \$\endgroup\$
    – The Photon
    Commented Aug 7, 2014 at 16:17
  • \$\begingroup\$ Can you use a simple RC lowpass filter to remove the high frequency noise while passing the line frequency? Put it ahead of the rectifier. \$\endgroup\$ Commented Aug 7, 2014 at 16:21

1 Answer 1


Here is a circuit which only lets through pulses with a repetition frequency of less than 1KHz.

When triggered by the leading edge of each input pulse, Monostable IC1 generates a 1ms pulse which clocks D F/F IC3's output high. IC3 is reset when the input pulse goes low again, so the output follows the input. If the frequency is higher than 1KHz then IC1 is continuously triggered and doesn't produce any clock pulses, so IC3 stays in reset.

R2, C2 and IC2B provide a short delay to ensure that IC3 is out of reset when it receives the clock pulse from IC1.

digital 'low pass filter' circuit

BTW this circuit can be simplified down to just one IC by configuring the other half of the CD4528 as a basic flip-flop. Connect pins 15 and 14 to GND, pin 11 to Vdd, apply clock input (from pin 6) to pin 12, and connect the input frequency direct to pin 4 (+TR) and pin 13 (/RESET). Output is on pin 10.


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