Why does NAND erase only at block-level and not page level?

Question

Below is my understanding of how NAND flash memory is organized, with this design it should be possible to just erase a single page and program it instead of erasing an entire block. My question is, why don't NAND implementation erase at a more granular page level? Intuitively, all that needs to be done is to present the word line representing the page being erased, with a high voltage to remove electrons off of the floating gate while leaving the other word lines untouched. Any explanation about the reasoning behind this is appreciated.

Answer 1

If you don't wipe them all at the same time, you'll need a much higher voltage because you're trying to raise the floating gate voltage a certain voltage above the source voltage. If the source isn't tied to ground through the other transistors, many of the source voltages will already be at some level higher than ground. Furthermore, if you tried to use a higher voltage, some of that voltage would likely end up on some transistors with their sources tied to ground which may be enough to damage the transistor.

Answer 2

NAND is programmable on a page basis because it has an individual gate or word line. When you inject the electrons into the cell, you only need positive voltage on one gate to "suck" the electrons.

It will be another story if you are pushing the electrons out of a cell. A high voltage is applied on the "base", or the p-substrate at the bottom. Unlike the gate, every cell in the block shares the same base. This asymmetry between gate and base causes this page-vs-block issue.

Theoretically, you can isolate each cell's base to be able to erase one page, but that would be super expensive to do so.

Answer 3

I was so confused by the idea of block erasing... I found a book explaining Flash memory in detail. You may be interested in the author's explantion:

...Erasing Flash in smaller chunks made management of code and data storage easier and safer. Most wonder why block sizes aren ’ t reduced all the way to the ideal of single byte/word erase. The reason is that the smaller the block, the larger the penalty in transistors and die area, which increases costs. While smaller blocks are easier to use and faster to erase, they are more costly in terms of die size, so every blocking scheme must balance its block sizes with device cost and the needs of its target application..."

cited from Nonvolatile Memory Technologies with Emphasis on Flash: A Comprehensive Guide to Understanding and Using Flash Memory Devices (IEEE Press Series on Microelectronic Systems) Joe Brewer, Manzur Gill