I have a ZedBoard FPGA device and I'm trying to implement an I2C interface to communicate with a camera module. I'm using Vivado 2014.2 and I have added an AXI IIC block to my design with the SCL clock frequency set to 90KHz. The physical SCL/SDA pins have a 10k pullup resistor to VCC (tried 4K7 also). For some reason, my scope shows both pins as already having some kind of invalid signal being output on them, when it should be asserted low as I have not setup any actual communication in software yet. Also notice that the speed of these signals is 24MHz! Which happens to be the speed of the onboard processor clock for some reason (no, the pins are NOT mixed up). Here is the scope output with the SCL/SDA pins:
Any idea why this is happening?