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Voltage output DACs are usually specified by a settling time. If a DAC converter has a settling time of T, can it be used to faithfully reproduce a signal which has been sampled at a frequency of 1/T? Or does this frequency has to be lower since there may be substantial ringing in the output signal if one changes the signal before the output has fully settled?

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One thing it would be helpful to know, but many DAC data sheets don't make it clear, is whether the DAC will always have its output value between the minimum and maximum value from among those received within the sampling time. On some DACs, if the input changes from 0x7F to 0x80, the ouput may momentarily swing to a voltage which is below the steady-state voltage for 0x7F or above the steady-state voltage for 0x80. On some other DACs, that won't happen.

If one has a DAC whose output voltage may go 'wonky' when its value changes, one must either use a sample/hold circuit to ensure that the voltage from the DAC won't be output when it's 'wonky', or else one must operate the DAC sufficiently below the rate implied by its settling time that the glitches will represent a small portion of the signal and one can filter them out.

If one has a DAC that won't go wonky, then one may output data at whatever rate one wants (subject to any express maximum limits in the data sheet) but the output may have artifacts related to the settling time. If the settling behavior mimics that of an RC filter, there won't be any problem, but if the DAC settles to some values faster than others, or if it behaves differently with large swings than small ones, the output may be regarded as having timing jitter equal to the settling time.

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From what I've seen in datasheets, it looks like the ringing will usually be a few octaves above the bandwidth implied by the settling time (1/T). If that's what's really going on, a low-pass filter should help to dampen that ringing out. On the other hand, I rather suspect that the actual bandwidth and ringing are influenced more by the impedance of the load the DAC is connected to, and the settling time listed on the datasheet is going to be the optimal case caused only by the parasitic capacitance of the DAC itself.

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