0
\$\begingroup\$

Good Day,

This is a lecture on Class A Output Amps by Upenn. Link here: http://www.seas.upenn.edu/~ese319/Lecture_Notes/Lec_20_PowerAmps1_10.pdf

enter image description here

I can't understand how when Vi is negative, it causes VCE2 to turn on. Vi is only connected to Q1 right, so if it's in negative mode, Q1 should be off, and hence behave like an open circuit. How is it, that Vi is still able to have an effect on Vo while negative?

I can get the equation Vo > -Vcc + Vce2-sat, but how does the second equation where Vi > -Vcc + Vce2-sat + 0.7 come about. Vi is not even connected to Q2, and that part of the circuit should be open, how can we deduce this?

\$\endgroup\$
1
\$\begingroup\$

Q2 is acting as a constant current sink. In 'negative mode', part of that current comes from ground via the load, and the rest comes from +Vcc through Q1. Even when Vi is negative, Q1 will still have a positive Base-Emitter voltage because Q2 is pulling the output voltage down.

As the output voltage goes more negative, more current comes from the load and less from Q1, either until the load takes all the current (at VL = -I*RL) or until Q2 saturates and cannot pull any lower (at slightly above -Vcc).

\$\endgroup\$
  • \$\begingroup\$ ah..from the ground..of course it makes sense now! Im sorry but i have to choose the other guys answer though, it was very thorough in explanation. \$\endgroup\$ – Raaj Aug 31 '14 at 13:36
  • \$\begingroup\$ I am wondering what is the purpose of the diode though \$\endgroup\$ – Raaj Aug 31 '14 at 13:37
  • 1
    \$\begingroup\$ It puts a temperature compensated 0.7V reference voltage on the Base of Q2. This may provide better stability and accuracy than just using a resistor to set Base current. It is a crude form of current mirror (see allaboutcircuits.com/vol_3/chpt_4/14.html). \$\endgroup\$ – Bruce Abbott Sep 1 '14 at 1:01
1
\$\begingroup\$

so if it's in negative mode, Q1 should be off

This isn't true. Q1 will be off if \$v_I\$ (Q1's base voltage) is more negative than \$v_O\$ (Q1's emitter voltage).

But, according to the schematic (and assuming an appropriate choice for \$R\$), \$v_O\$ can be almost as negative as \$-V_{CC}\$

$$v_{O_{,min}} = -V_{CC} + V_{CE2_{,sat}}$$

Thus, in fact, Q1 will not necessarily be off if the input voltage \$v_I\$ is negative, only if the base-emitter voltage \$v_{BE1} = v_I - v_O\$ is zero or negative.

but how does the second equation where Vi > -Vcc + Vce2-sat + 0.7 come about

As you probably know, we typically assume that the base-emitter voltage is about 0.7V when the transistor is 'on' thus, it follows that the minimum input voltage that still allows Q1 to be 'on' is

$$v_{I_{,min}} \approx v_{O_{,min}} + 0.7V = -V_{CC} + V_{CE2_{,sat}} + 0.7V$$

In summary, I suspect that you're failing to distinguish between the input voltage \$v_I\$ and \$v_{BE1}\$, Q1's base-emitter voltage.

While it's true that Q1 will be off if \$v_{BE1} < 0\$, it's not necessarily true that Q1 will be off if \$v_I<0\$.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.