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I am designing a simple programmable LED screen system as an exercise, and I need a non-standard type of SRAM (16x5) so I am designing the memory circuits. I have looked everywhere (Digikey, TI, National Semiconductor, etc.) for a chip that is just a sense amplifier for SRAM and I haven't found anything. I called TI and they said they didn't make anything like that, but I may be able to use a comparator for that. My question is, is it possible to wire up, say, a LM339 as a sense amplifer? And if so, how?
Thanks

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  • \$\begingroup\$ If you're building this as an exercise in SRAM design, I'd make it out of discrete transistors. Google will get you many simple sense amplifier designs. Sounds like a neat project if you need custom SRAM circuitry. \$\endgroup\$ – krapht Apr 9 '11 at 4:34
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To answer your question, yes you can use a LM339 as a sense amp, and all you need to do is wire the + input to the non-inverting bit-line, and the - input to the inverting bit-line. BUT...

Since we're talking about reading a SRAM, the basic sequence of events during a READ is:

  1. Pre-charge both bit-lines to VDD.
  2. Assert the desired word-line
  3. The selected bits will now pull one of each complimentary bit-line pair towards VSS
  4. The sense amplifier will sense a difference between the bit-line voltages (one will stay at VDD, the other will be falling towards VSS)

If you look at the schematic for a 4T or 6T bit-cell, then you can see that the falling bit-line will eventually reach VSS. In typical IC designs, where density is very important, the bit-cells have very small transistors. Additionally, they are typically built into large arrays, which have very large bit-line capacitances. This results in a very slow (relatively) discharge of the bit-line by the bit-cell. This is the motivation for the speed aspect of a sense amplifier. It probably doesn't apply to you because you can use large transistors (since they're discrete, or in an array), and your array is small.

The isolation aspect of the sense amp is also very important. If you don't use a sense amp, your bit-line will have an unknown load based on whatever you hook up. Also, any noise on the signal will be broadcast to all your bit-cells. Some isolation is always a good idea here. Something as simple as a CMOS buffer/inverter will work just fine.

I don't think you're going to see a major benefit from using a comparator to sense the bit-lines. Instead, I would recommend that you use a CMOS inverter or buffer. It will be simpler, just as fast, and denser.

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Unless you're trying to use the smallest transistors you can get away with to hold data, I'm not clear why you would need sense amplifiers. Wouldn't the data latches and passgates themselves provide enough strength to drive a normal logic input?

Actually, I would expect that the simplest way to get a 16x5 RAM would be to simply use a 32Kx8 SRAM and ignore the upper part. Otherwise depending upon your you might be able to use something like a dual 64-bit shift register chip which has taps every 16 bits. Combining that with a 74LS374 or equivalent along with suitable clocking logic you should be able to store 80 bits fairly nicely and access them five at a time.

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  • \$\begingroup\$ The thing is, I don't want to use any pre-built memory chips. I would like to build the whole system myself if possible. I have most of it designed, I just need the comparator/sense amplifiers for memory output \$\endgroup\$ – Nate Koppenhaver Apr 9 '11 at 19:31
  • \$\begingroup\$ @Nate Koppenhaver: What are you using to hold the data? As I noted, using sense amplifiers will data to be held using smaller transistors than would otherwise be necessary, but in a 16-row memory array you're almost certainly better off using storage elements that can easily drive logic-level signals, than using "wimply" storage elements along with circuitry to amplify their outputs. \$\endgroup\$ – supercat Apr 9 '11 at 23:36
  • \$\begingroup\$ I'm using arrays of 6-Transistor SRAM cells \$\endgroup\$ – Nate Koppenhaver Apr 11 '11 at 2:37
  • \$\begingroup\$ Using MOSFETs? How are you implementing the pass-gates? Within a chip, the substrate of the pass-gate transistor would be tied to VSS, independent of the source and drain, but discrete MOSFETs generally tie the substrate to the source. Are you using transistors with a discrete substrate connection? How are you limiting the drive strength of the PFETs so as to allow them to be overdriven? I would guess that if you precharge all the columns columns to VDD before enabling a row, you would be able to read out a column as a straight logic level. \$\endgroup\$ – supercat Apr 11 '11 at 14:34
  • \$\begingroup\$ it's still in the design phase, but i'm planning to use 2 NPN transistors (i already have about 250 in my collection :) and 2 inverters for the feedback circuit, probably in a 4049 \$\endgroup\$ – Nate Koppenhaver Apr 11 '11 at 21:59
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If you are not shooting for top speed(>1Mhz), you don't need any sense amplifiers.

Standard 2T trigger (plus some Ts for accessing the data) would give you close to 0 and VCC voltages.

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(a) Are you using an off-the-shelf SRAM IC chip? If so, it already includes the sense amplifier -- the bitlines cannot be accessed from the outside, even if you wanted to.

(b) Are you not using an SRAM IC chip? I.e., are you storing a few bits in a D latch or a shift register IC chip or are you building something out of 3 000 discrete transistors? If so, then you don't need a sense amplifier. As supercat mentioned, the output transistors of those devices is much larger than the tiny transistors inside a chip, and so that output can directly feed a digital input -- at worst you might need some digital inverter/tristate/line-driver/buffer to give you better fanout.

Do you actually have something -- such as, say, magnetic core memory -- that needs a sense amplifier? While I doubt that is actually the case, if so, the LM339 may work fine for you -- please tell use what you are actually building.

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  • \$\begingroup\$ see comment below \$\endgroup\$ – Nate Koppenhaver Apr 11 '11 at 2:37

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