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given the circuit below to be used as a H-bridge with AVR PWM. h-bridge circuit

Is this a good desing to use? What can you recommend?

I already built something like this but without the resistors. ( and so burned the fets ) My fear is that when the PWM signal switches between HIGH and LOW there will be a small amount of time when both mosfets on the same side will be 'half-open' and so shorting the circuit. Could it happen or is this design safe?

Thank you for helping!

---UPD: here's my new idea of the schem. according to the comments: enter image description here

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  • \$\begingroup\$ Separate gate signals work better and also allow to freewheel the motor. Some AVRs (such as AT90PWM2) also have hardware dead time insertion. \$\endgroup\$ – venny Sep 7 '14 at 10:46
  • \$\begingroup\$ How much current is the motor using? What MOSFETs do you plan to use. Which AVR are you using? \$\endgroup\$ – gbulmer Sep 7 '14 at 14:21
  • \$\begingroup\$ I'm using ATtiny84A powered from +5V, and the max motor current is 1A. \$\endgroup\$ – lszabi Sep 7 '14 at 20:34
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In principle it is ok but it does suffer from shoot-through's during PWM transitions.

This is compounded by the fact that P-TYPES switch slowed than N-TYPES.

Depending on how much current you plan to draw through the MOSFET's you could simply solves this by putting a diode-resistor pair in parallel with the already present gate-resistor (while possibly increasing that resistor to say... 300R).

By choosing the resistor's and the diode orientation correctly (ie for the N-TYPES point away from the GATE, P-TYPE... towards the GATE) you can tweak the switching characteristics of the MOSFETS such that they have a slower turn-ON and a faster turn-OFF.

While this will not 100% remove switching transient shoot-throughs, they will not be as severe and you may find the additional switching losses is manageable through adequate heatsinking rather than additional complexity.

Failing that you will need separate gate signals.

Also what is the output voltage? 3v3 or 5V. if it is 3v3 you are going to have to be very careful with regards to the Ptype Vt

Also what is the drive capability of your I/O. you would want to be able to source and sink a reasonable amount to ensure the gate is charged/discharged fast enough to ensure fast enough switching == minimise switching losses

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  • \$\begingroup\$ Ok, thanks for the quick answer. Let's say if I use 4 separate pins to drive gates: drive the P-cahnnels with digital LOW/HIGH and connect the N-channels to PWM. Keeping the gate resistors, what pull-ups and downs do I need? Will it be better this way? \$\endgroup\$ – lszabi Sep 7 '14 at 10:50
  • \$\begingroup\$ are you still planning on applying PWM to the P-types (i hope so) As to what pull-up and pull-down DEPENDS... is the AVR you are using 3v3 output... If so you might have gate issues with the Ptype. if the I/O is 5V... 4k7 should be ok as you are powering it all from 5V so the logic out is comparable to the inverters powerRail - Personally I would use a dedicated FET drive (either an IC like IR4428) or make a push-pull out of BJT's \$\endgroup\$ – JonRB Sep 7 '14 at 17:20
  • \$\begingroup\$ Why should I also apply PWM to P-channel mosfets? Isn't it enough for the N-channel to be PWM controlled while the P-channel act as a basic switch? (+5V AVR btw) \$\endgroup\$ – lszabi Sep 7 '14 at 20:36
  • \$\begingroup\$ Imagine if you provide a LOW to the left Ptype (ie turn it on). Now imagine you provide PWM to the lower Ntype. When the PWM is HIGH you would have now commanded both switches in a leg to be ON. Your initial concern was a transient shoot-through, what you have described is an intentional shoot-through. with a 5V I/O you are ok from a voltage level, what about current source capability to switch the MOSFET's fast enough? \$\endgroup\$ – JonRB Sep 7 '14 at 20:40
  • \$\begingroup\$ I think you have misunderstood my idea. I just posted a new schem. I would simply turn on the left P and apply PWM to the right N while the right P and left N would be kept off. These are 4 separate data pins. \$\endgroup\$ – lszabi Sep 7 '14 at 20:44

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