I've built quite a few circuits but I've never really designed anything from a "schematics first" approach. Mostly just tinkered with designed and code until I got it right.
Now, I want to build a horizontal timer circuit for an NTSC computer project I am working on.
Anyway, assuming I have a
74xx4040 12-bit ripple counter that is clocked at
7MHz I want to enable other circuits when the master counter (the 74xx4040) reaches certain values. The counter would count from
447 and on the 448th value reset to 0.
During those 448 counts, I have identified the following bit values as my "trigger" points. These are the
0001 00000 (32) 0010 00000 (64) 0011 00000 (96) 0100 00000 (128) 1100 00000 (384) 1110 00000 (448) -- RESET
Other than putting a crazy amount of AND/NAND/NOR/etc. gates connected to the 4 MSB's, is there a simpler way? I only have 2-input gates available (AND/NAND/NOR/XOR/etc.).
My thinking is that each area of the circuit would be clocked by the same 7MHz clock. And as the master counter reached, say 96 for example, the first 4 bits (0011) would turn on the
CE pins of all of the other IC's for that section. And when the master counter reaches 128 (0100) then only that section would be enabled and the CE of the previous would be disabled.
Hope that makes sense.
Is this a practical/sane way of approaching this?