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Shunt current sensing

I want to sense the voltage across the resistor R1 (i.e convert it into digital form). I only have comparators available with me and no other hardware (ADC is not available). Is there any way I could digitize this voltage across R1. from the circuit we can see the output of comparator would go from 0-5V as the voltage V1 is varied from 0-5V or if the voltage is fixed to 5V then the output will always be high (5V). Similarly, if we make the current flow in opposite direction the output will go from 0 to -5V or remain at -5V when supply is not varied. so the comparator acts as a 1 bit ADC. But a multibit output is required to sense the varying voltage across R1. The digital data has to be taken into an FPGA. So any suggestions in this regards. enter image description here

The second image is the solution i had found FPGA ADC. This also uses a single ended analog input, whereas i have a differential input across a resistor.

EDIT #

  • So i am again attaching a circuit diagram to make things clear circuit The load shown is not the real load. The voltage across the current sensor has to be converted to digital and i have simple delta sigma ADC available which will be made using the LVDS receivers in the FPGA. So how to convert this differential voltage into digital using delta sigma ADC ? The purpose of all this is i have to sense the charging and discharging current of a lithium ion battery using a fpga that fits in a portable device.So i want to keep external components at a minimal and the fpga uses a delta sigma ADc made in the fashion shown in ADC block diagram
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    \$\begingroup\$ Just about alll your options are more difficult and have more parts tha, getting an ADC. I sugggest posting why this is not an option. \$\endgroup\$ – Scott Seidman Sep 9 '14 at 11:11
  • \$\begingroup\$ My main concerns are 1) The delta sigma ADC has the analog input as one input of comparator while the other input of comparator is low pass digital output.2) I have to measure a differential voltage whereas the delta sigma ADC takes single ended input. 3) I cannot use external components to convert this differential output to a single ended one(this will mostly require a opamp). \$\endgroup\$ – user22348 Sep 9 '14 at 11:18
  • \$\begingroup\$ If i am wrong can this differential voltage me converted to digital using sigma delta ADC ? In that case a block diagram would be highly appreciated \$\endgroup\$ – user22348 Sep 9 '14 at 11:20
  • \$\begingroup\$ Any circuit that converts that voltage to a digital value IS an ADC. You so are in effect saying that you don't want to use an ADC chip but want to built your own ADC?? If so there are various options, depending on the speed, number of bits, linearity, current consumption, etc., that you want to achieve. In most cases you will spent a lot more effort than just taking an existing ADC. \$\endgroup\$ – Wouter van Ooijen Sep 9 '14 at 11:54
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    \$\begingroup\$ A SPI based ADC can be very cheap and single or differential modes are available, other wise look up "1 bit A to D"... and youtube.com/watch?v=DTCtx9eNHXE \$\endgroup\$ – Spoon Sep 9 '14 at 12:46
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You can use the comparator to build a Delta Sigma ADC.

You have to disconnect the negative comparator input from ground and connect it to a low pass filtered digital output of your digital logic (FPGA).

EDIT:
The 2nd picture in your post (I think you added later) is exactly what I mentioned above. It represents a Delta Sigma ADC. (So I think I don't need to provide any reference any more. BTW you will find enough references if you search the web with keywors "Delta Sigma converter").

The block diagram, however, shows something that makes me wonder:
there is a LVDS receiver where a I would expect an analog comparator.

A differential receiver is some kind of comparator, but I doubt that it is well suited for this application. For its original purpose as differential receiver just has to be fast but not very exact concerning the differential voltage (offset) and probably it has considerable hysteresis.

A precision comparator would be more appropriate.

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  • \$\begingroup\$ could you provide any references i could look into that could help me understand this concept.wouldn't your suggestion work when you have a single ended input. But in my case i have a differential input signal \$\endgroup\$ – user22348 Sep 9 '14 at 11:04
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    \$\begingroup\$ A dual slope ADC might be even easier to build than a Delta Sigma. \$\endgroup\$ – Scott Seidman Sep 9 '14 at 14:55
  • \$\begingroup\$ @Scott Seidman: A dual slope ADC would definitely not be easier on the analog side. A Delta Sigma ADC needs just a low pass filter (capacitor, resistor). A Dual Slope ADC would need in addition an OpAmp for integration and some kind of analog switch for switching between the reference voltage and the voltage to convert. Since the digital part seems to be done in a FPGA I assume that it doesn't matter if the digital part would be a little bit more complex (and this depends much on the format of the digital data; even the digital part would be less complex if a stream of 0s and 1s is OK). \$\endgroup\$ – Curd Sep 9 '14 at 21:48
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You can couple the signal to be measured to a group of comparators, each with a different value of threshold voltage.

schematic

simulate this circuit – Schematic created using CircuitLab

The threshold voltage is determined by each of the resistive dividers connected to the reference voltage. As the signal to be measured vary, different comparators will switch and the output set value representing an encoding signal. Depending upon the form of coding looked for, it may be necessary to add logic to the output of the comparators.

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    \$\begingroup\$ Yes you have a valid design here. But the presence of the resistor divider circuits will result in a lot of power dissipation.So I don't want to use external resistors. \$\endgroup\$ – user22348 Sep 9 '14 at 11:12
  • \$\begingroup\$ @user22348 Not true whatsoever, even if you use 100k as your minimum value you will waste less than 150uA. \$\endgroup\$ – ACD Sep 9 '14 at 12:24
  • \$\begingroup\$ Several issues here. 1: What's the point of the buffer, since it's only driving other comparator inputs? 2: For better accuracy and monotonicity, you should have one overall Vref divider with multiple taps. 3: No, the output of each comparator isn't a bit from the overall A/D converter. Your outputs are NOT binary encoded, so "bit" is misleading at best. \$\endgroup\$ – Olin Lathrop Sep 9 '14 at 13:23
  • \$\begingroup\$ @OlinLathrop Thanks for your comments, they are very useful. The wiring diagram is not intended as a finished design implementation, but rather an idea about it. It is easier to show the idea behind using a schema that writing about it. \$\endgroup\$ – Martin Petrei Sep 9 '14 at 13:45
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It's not clear to me what it is you're trying to do or what your constraints are, I'm going to assume that you want to add in some passive (minimal components) to an existing FPGA and see if you can get a cheap and dirty ADC. Otherwise you would not have posted that 2nd picture.

I think what you are missing in your second picture is how this might work. Simply it is a RC charging circuit with a comparator to detect when the compared voltage reaches an (unknown) threshold. The internal count (i.e. time) will give you an exponential relationship to voltage (or \$ 1-e^{-t/{RC}} \$ ).

In your case using the LVDS input, I presume you are using the differential termination of the input as a cheater resistor and then you want to do something similar.

The solution for you will probably be to drive the output to a rail (either ground or Vss or alternatively both - first one and then the other) and then tristate it so the driver cannot influence the RC curve you see. You would then hang a capacitor off of the measuring input.

The problem with this is that the input will only pull to Vin_+ and there might be issues with polarity. Often these inputs have hysteresis around V+ = Vin. In which case you may need to add a pull up.

schematic

simulate this circuit – Schematic created using CircuitLab

It will be cheap and dirty and prone to temperature and process shifts. But it will convert.

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I want to sense the voltage across the resistor R1 (i.e convert it into digital form). I only have comparators available with me and no other hardware (ADC is not available). Is there any way I could digitize this voltage across R1.

You could make a flash converter and generate thermometer code, or configure a bunch of comparators into the logic you'd need to convert the thermometer code into binary, BCD, or whatever form you needed to feed into your FPGA.

from the circuit we can see the output of comparator would go from 0-5V as the voltage V1 is varied from 0-5V

NOT TRUE!

The output of the comparator will be high whenever the + input is more positive than the - input, and low whenever the - input is more positive than the + input.

Moreover, the way you've drawn it will assure that no matter what voltage is across R1, the comparator's output will always be high.

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Saying you can't use a A/D because it is not available is not a valid reason. Perhaps no local shop in your area has A/Ds, but they are certainly available from many many places that can be reached via the internet.

If the purpose, as you say, is to convert a voltage to a number, go get a A/D and stop complaining you don't have one.

If you want to make your own A/D for learning, for fun, or whatever personal reason, that's fine. But, then you need to say so to get relevant answers because that's a quite different problem than the one you ased about.

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  • \$\begingroup\$ I am not saying i don't have ADC available.My intention here was to know if this could be done without using an external ADC.sigma delta ADC is one of the ways to achieve the desired thing is what i have understood so far.I have also attached the ADC block i have found. Just need help regarding interfacing a differential input to the LVDS reciever. \$\endgroup\$ – user22348 Sep 9 '14 at 13:35
  • \$\begingroup\$ @user22348, I can understand that, but perhaps you could have asked the question in a way that made that clear. A good part of engineering is effective communication. Asking for what you need in a way that people can understand it is a skill to be acquired. \$\endgroup\$ – Scott Seidman Sep 9 '14 at 22:24

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