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In the image(http://www.allaboutcircuits.com/vol_3/chpt_4/4.html), the result of SPICE simulation for active mode operation of BJT is shown.

The current source is set at a constant value of 20uA and the collector bias voltage is varied from 0 to 2V.

If you see the description of the image, it's mentioned that:

"A Sweeping collector voltage 0 to 2 V with base current constant at 20 µA yields constant 2 mA collector current in the saturation region"

Constant 2 mA collector current in the 'Saturation Region'? As I have understood, the saturation region is the part that lies to the left of active region(where Vce is almost zero) From what is shown in the image is it not that the 2 mA collector current in Active Region?

If the voltage is increased above 2V, there would be no change in the collector current as it's limited by the base current. The maximum current that we have as output is 2mA. How do you say that the transistor is now in Saturation mode?

Please explain me why the saturation region is indicated to the left of active region? From the characteristic curves, it seems that the region that is marked as 'active', is actually the Saturation because there is maximum collector current there.

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You have understood this correctly and it appears the author of the document you linked is wrong - for a MOSFET they have perfectly described the saturation region but, this is a BJT circuit and the saturation region is the left hand side. Here's the drawing they talk about: -

enter image description here

Saturation is when the current and voltage rise almost linearly together for a fixed base current.

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Perhaps it helps to give some explanation to the term "saturation". Yes - there are two different meanings of the term "saturation" - dependent on the transistor type: BJT or FET. In this context, we should answer the question: Where is this term coming from - that means: Which quantity is "saturated?

1.) BJT (with collector resistor): Increasing Vbe (or Ib) leads to rising collector current Ic, which causes a continuous decrease of the collector-emitter voltage Vce - until a lower limit is reached at app. (0.4...0.6)volts. A further increase in input voltage/current does not cause a further increase of Ic. Thus, Vce has reached it´s lower limit and cannot become smaller. We say: The voltage Vce has reached the state of "saturation"(and - at the same - time the current Ic cannot assume larger values).

2.) In contrast to this effect, for FET´s the term "saturation" means something else. For small drain-source voltages Vds we have approximately a linear relationship between Vce and the current Id (for a fixed control voltage Vgs). This region is called "linear region" or "resistor region". However, for further increasing the voltage Vds beyond a certain threshold (pinch-off) the current Id does not increase anymore (in fact, a slight increase due to channel width modulation can be observed). That means: The current Id has reached the state of "saturation".

Summary: It is an unfortunate situation that two different meanings of the term "saturation" are in use (for BJTs and for FETs), but - due to historical reasons - we have to be aware of these two different definitions.

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  • \$\begingroup\$ Thanks! I'm unable to clearly relate the concepts I've understood with these plots. If you plot the equation VCE=VCC−ICRC, you'd get a straight line with negative slope. This clearly explains that the current will be maximum when transistor operates in saturation region (max)IC=(VCC−VCE(sat))/RC But I can't make this out from the common emitter characteristic curves. In that plot collector current approaches zero when the collector voltage is around 0.4V i.e., when it's saturated. Could you please explain this? \$\endgroup\$ – Aditya Patil Sep 16 '14 at 13:35
  • \$\begingroup\$ "In that plot collector current approaches zero when the collector voltage is around 0.4V." Please, can YOU explain THIS? I don`t understand this statement. \$\endgroup\$ – LvW Sep 16 '14 at 14:16
  • \$\begingroup\$ My understanding is that, in saturation the current Ic should be maximum. I think that when transistor is used as a switch, it's driven to saturation invariably having maximum IC. Of course it depends on base current as well as the relation Vce being equal to Vcc-IcRc. I began to doubt this phenomenon, as Ic is shown in the above graphs to be starting from zero! As you can see from the graph,in the region marked as saturation, the collector current is zero for Vce= 0.2 to 0.4V. Shouldn't it be maximum? I'm indebted to you for your insights :) \$\endgroup\$ – Aditya Patil Sep 16 '14 at 14:59
  • \$\begingroup\$ No - Ic is not "maximum" in saturation region. It has a value (for given conditions) which cannot be further increased. That´s all. To me, the collector current comes from the origin - and, thus, it is not zero for Vce=0.2...0.4 but has a finite value. Sorry, but I cannot follow you. \$\endgroup\$ – LvW Sep 16 '14 at 21:02
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Here's a typical Ic vs Vce diagram showing the saturation region of a BJT.

enter image description here

In this case if Ib is set at 20uA and Vce varies between 0 and 2V you can clearly see that Ic will also vary from about 12mA (Vce=2V) to about 8mA @ Vce = 0.5V (very non linear) to 0mA @ Vce = 0V. Clearly either the original author is just plain wrong or I need to rethink everything I know about BJTs.

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  • \$\begingroup\$ It's not that non-linear Jim - the diagram you linked is very poor at showing the saturation region. \$\endgroup\$ – Andy aka Sep 16 '14 at 12:50

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