Suppose this is the biasing process of an NPN transistor.
simulate this circuit – Schematic created using CircuitLab
The battery to the left forward biases the emitter diode because its +Ve terminal is connected to the the P-type base and -Ve terminal to the n-type emitter.
But how does the right battery reverse bias the collector diode?
I get the +Ve side of this battery is connected to n-type collector, but its -Ve side is also connected to the N-type emitter.