How does this constant current sink actually work?

I have implemented a constant current source and it works wonderfully, but I was just hoping to try and understand it a little bit more! Here is the circuit in question:

I have tried doing some searching on the web and have found it quite difficult to find any theoretical things on this circuit that explain what is actually going on with everything. I did find out that the current through the transistor can be found simply by using $$I_{E}=\frac{V_{\text{set}}}{R_{\text{set}}}$$ which was a lot more than I knew before I started looking. But now I want to know what is actually going on and how it remains a constant current output even with a varying load/voltage at the load.

If anyone would be able to shed some light onto this, I would be highly appreciative.

• Well first just try removing the transistor and having the load connected directly to the opamp. Analyze that with your standard opamp rules. The transitor is added as a booster to allow more current. (There's a beta error in that circuit and if you want precise control a FET is often used in place of the BJT.) – George Herold Sep 17 '14 at 15:07

The circuit employs negative feedback and utilizes the very high gain of the op amp. The op amp will try to keep its non-inverting and inverting inputs at the same voltage $V_{\text{set}}$ due to its very high gain. Then by Ohm's law

$$I_{\text{set}} = \frac{V_{\text{set}}}{R_{\text{set}}}$$

Negative feedback causes the op amp to adjust the transistor base voltage so that $I_{\text{set}}$ is constant even with a varying load. If the varying load causes a temporary increase in $I_{\text{set}}$ then the voltage at the op amp's inverting input will temporarily rise above the non-inverting input's. This causes the op amp's output to decrease, which lowers the transistor's $V_{BE}$ and therefore its $I_{C} \approx I_{\text{set}}$.

Similarly, if the varying load causes a temporary decrease in $I_{\text{set}}$ then the voltage at the op amp's inverting input will temporarily fall below the non-inverting input's. This causes the op amp output to increase, which increases the transistor's $V_{BE}$ and $I_{C}$.

The opamp is acting as a unity-gain buffer, though it may not be obvious:

The rule for opamps is that the output does whatever it has to to keep the two inputs equal, provided that it doesn't clip of course (run into its own supply and stop there).

The transistor is used as an emitter-follower, in which the emitter voltage follows the base voltage minus a diode drop from its P-N junction.

Put those two together, and you'll see that the voltage at the top of Rset is the same as Vset. Known voltage across a known resistance equals known current through that resistance. In most transistors, the base's contribution to the emitter current is negligible, so you get practically the same current through the load as well, regardless of its supply voltage or resistance. But if you're using it for a serious design, it wouldn't hurt to verify this negligibility with your specific parts.

• It isn't really a unity gain buffer. Consider: since the voltage on the opamp output must be higher than the voltage on the opamp inputs in order to drive the transistor's base to a Vbe drop higher than the voltage on the opamp inputs, it must have a gain greater than one, yes? – EM Fields Feb 24 '16 at 23:45
• @EMFields: It does have a constant offset, but still a voltage gain of one. Internally, the opamp has a huge gain, but that's only used to minimize the error between reference and feedback. The circuit as a whole has unity-gain, plus that offset at the transistor's base. – AaronD Feb 24 '16 at 23:53
• If Vset is 6 volts and the voltage on the opamp output goes to 6.7 volts in order to drive the top of Rset to 6 volts, then the voltage gain of the opamp will be $Av =\frac{Vout}{Vin} = \frac {6.7V}{6V} = \text{ 1.117}$, which is greater than unity. – EM Fields Feb 25 '16 at 0:01
• @EMFields: Gain is a 2-point calculation. If you assume Vout = Vin = 0V for the other point, then you'd be right. But it's not here. Run the math again with {Vout, Vin} = {0.7, 0.0}V for one point and {Vout, Vin} = {6.7, 6.0}V for the other. – AaronD Feb 25 '16 at 0:05
• Utter nonsense. Gain is, indeed, a two point calculation, but the two points are simply the output (the dividend) and the input (the divisor) with gain being the resultant quotient. For a unity gain buffer the quotient is always 1 which, in your case, isn't true since you've inserted a base-to-emitter junction in the feedback path, causing the output to rise to a higher voltage than the input, causing the quotient to be greater than 1. Bottom line? What you're calling a unity gain buffer, isn't. Need more proof? type "unit gain buffer" into your browser and see what comes up. – EM Fields Feb 25 '16 at 0:43

The way I like to visualize it is to consider the transistor as a variable resistor which the opamp adjusts automatically in order to keep the voltage at the opamp's - input equal to the voltage on its + input.

That way, since the current in a series circuit is everywhere the same, the current in the load, the transistor CE junction, and Rset must be the same and, if the voltage at the top of Rset never changes because the opamp forces it equal to Vset, then its current never changes and the current through the load can't, either.

Another approach is to model the op amp as a large finite gain and the take limits.

This gives the op amp output as $K(v_\text{set}-I_\text{load} R_\text{set})$ from which we have $K(V_\text{set}-I_\text{load} R_\text{set}) = I_\text{load} R_\text{set} + 0.7$. Dividing across by $K$ and letting $K \to \infty$ gives the desired result, $I_\text{load} = { V_\text{set} \over R_\text{set} }$.

Another, simple, but accurate way to see this is using feedback theory:

The Op Amp output is simply the gain of the Op Amp (A) times the difference between the voltage at the inputs. If we call the voltage at the resistor $V_x$ (since we don't yet know what it is), then the output of the Op Amp is simply:

$$V_o = A \cdot (V_{\text{set}}-V_x)$$

Now, we know that when the transistor is on, there is a constant voltage across the base-emitter junction, $V_{\text{be}}$, so we can write:

$$V_x = V_o - V_{\text{be}}$$

Substituting this into the $V_o$ equation we get:

$$V_o = A \cdot (V_{\text{set}} - (V_o - V_{\text{be}})) = A \cdot (V_{\text{set}} + V_{\text{be}}) - A \cdot V_o$$

or:

$$(A + 1) \cdot V_o = A \cdot (V_{\text{set}} + V_{\text{be}})$$

So, rearranging we get:

$$V_o = \frac{A \cdot (V_{\text{set}} + V_{\text{be}})}{A+1}$$

Now, we know that with an op amp, A is very large, so, as A grows toward infinity we can see that $\frac{A}{A+1}$ goes toward unity:

$$\frac{A}{A+1} \to 1$$

Thus:

$$V_o=V_{\text{set}}+V_{\text{be}}$$

However, we wrote above that:

$$V_x=V_o-V_{\text{be}}$$

Substituting this expression for $V_o$ above we get:

$$V_x=(V_{\text{set}}+V_{be})-V_{\text{be}}$or$V_x=V_{\text{set}}$$

And obviously, $I_{\text{set}}=\frac{V_{\text{set}}}{R_{\text{set}}}$, which you already knew.

My answer is likely more than you bargained for but if you’re curious, you’ll appreciate the effort I put into it.

A typical OP AMP has an open-loop gain of at least 100,000 (very high). Its output takes the difference of its inputs ( $V_{+} - V_{-}$ ) and multiplies them by its gain $A_{v}$. $V_{o} = A_{v} * ( V_{+} - V_{-} )$. Here, $V_{+}$ = non-inverting input and $V_{-}$ = inverting input. Assuming the op amp’s output is only a few volts, then the difference voltage at the input is 1/100,000 the output. This difference may be a few microvolts which when compared to $V_{o}$ is much, much smaller (this difference voltage is for all intents and purposes approximately zero volts).

In a closed-loop configuration, such as this one, $V_{+}$ is said to be virtually the same as $V_{-}$. Since, $V_{+} = V_{set}$ and because the input voltage difference is “zero”, $V_{-} = V_{set}$. $V_{-}$ is connected to the top of $R_{set}$ and the emitter of the bipolar transistor, thus $V_{set}$ also appears across $R_{set}$. So, $V_{set}$ controls the magnitude of Iset through $R_{set}$ and, with the negative feedback arrangement of the circuit, the op amp delivers whatever base current is required by the transistor to maintain $V_{set}$ at its emitter.

The transistor itself has gain (typical gain = ${ I_{collector} \over I_{base} } > 40$ for a power transistor). Assume $I_{emitter} \sim I_{collector}$.

Note that the base current delivered by the op amp comes from the op amp’s +V supply (not shown in the schematic) and not $V_{set}$ which “sees” the very high impedance of the non-inverting input ($Z_{in}$ to either (+) or (-) op amp inputs is very high, typically megaohms or higher). $V_{set}$ need not have much drive capability because its load, the $V_{+}$ input, demands essentially no significant current. If $V_{supply}$ (above the collector resistor) varies or the collector resistor value varies, $I_{load}$ remains unchanged providing $V_{supply}$ and $R_{collector}$ don’t go outside the circuit’s operating limits.

Consider what happens as $V_{supply}$ decreases. Feedback will cause the op amp’s output to increase the transistor’s base current so it conducts more and lowers its $V_{CE}$ to maintain the same voltage drop across $R_{collector}$ to keep $I_{load}$ constant. At some point, the transistor will be fully on (saturation is the best it can do with $V_{CE(on)} ~ 0.3V$). A further decline in $V_{supply}$ will result in a decreasing $I_{load}$ despite the negative feedback. There is no longer enough $V_{supply}$ voltage to keep $I_{load}$ constant and the circuit no longer functions as intended. If $V_{supply}$ increases, the op amp drives less base current into the transistor, which conducts less, raising its $V_{CE}$, to maintain the same voltage drop across $R_{collector}$ to keep $I_{load}$ constant. A point will be reached that exceeds the transistor’s $V_{CE}$ rating or its power rating ($I_{load}$ may be constant but $V_{CE}$ x $I_{load}$ is increasing) and it will fail. What happens if $R_{collector}$ varies when $V_{supply}$ is within limits? If $R_{collector}$ resistance increases, the op amp will make the transistor conduct more, decreasing its $V_{CE}$, to increase the voltage drop across $R_{collector}$ to keep $I_{load}$ constant. Eventually the transistor is fully on (saturated) and as $R_{collector}$ resistance rises further, $I_{load}$ begins to decrease because the circuit cannot continue to increase the voltage drop across $R_{collector}$ ($V_{supply}$ voltage is not high enough to achieve this).

If $R_{collector}$ resistance decreases toward zero, the op amp will lower base current and the transistor will conduct less to reduce the voltage drop across $R_{collector}$ to maintain $I_{load}$ constant and its $V_{CE}$ will increase. The transistor will dissipate more power because it will have a greater voltage drop across it ($V_{supply} - V_{set}$ if $R_{collector} = 0 ohm$). If it cannot handle the higher power, it will fail. It may seem odd that a transistor conducting less dissipates more power but this is so because it’s operating within its active region where both Ic (normally constant) and $V_{CE}$ are significant and their product (power dissipated by the transistor in the form of heat) is well above zero. A fully on (saturated) transistor operates with lower power dissipation because its $V_{CE(on)}$ is very low for the same, constant current.

In conclusion, this circuit operates as a constant current sink but only within certain $V_{supply}$, $R_{collector}$ and transistor power limits. These operating limits must also be considered during design.

• This answer would improve if you broke the text into paragraphs. – hlovdal Mar 8 '15 at 14:33