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I'm looking at the RAM compatibility table for my motherboard:

RDIMM

and it shows that dual-rank (DRx4) memory modules can operate at twice the speed of quad-rank (QRx4) memory modules (1600 MT/s vs 800 MT/s with 2 DIMMs per Channel).

Does this mean DRx4 DIMMs' connection to the CPU has twice the bandwidth of QRx4 DIMMs, or are the higher MT/s numbers offset by each transfer being twice smaller?

If the bandwidth is actually lower for QRx4 DIMMs, then why?

As I understand it, at least with registered RAM, the CPU is not directly connected to the RAM chips, so any additional load inside the DIMM should be a separate issue.

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I believe this is due to higher electrical loading on the data lines (more capacitance). It is more difficult to drive data over the memory bus with the extra load, so it has to slow down. This is also why putting more DIMMs per channel limits the speed.

Edit: take a look at page 15 of this PDF: http://www.nanya.com/NanyaAdmin/GetFiles.ashx?ID=493

All of the DQ pins (data) from all of the chips are connected in parallel, increasing the load capacitance on the data lines. The increased load capacitance slows the rise time of the data lines and limits the maximum rate. The only registered lines are those that drive the address, control, and clock pins on the chips. Registers are not used on the data lines because the data bus must be able to 'turn around' very quickly. The address control, and clock pins only run in one direction.

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  • \$\begingroup\$ As I understand it, at least with registered RAM, the CPU is not directly connected to the RAM chips, so any additional load inside the DIMM should be a separate issue. (Edited) \$\endgroup\$ – MaxB Sep 17 '14 at 21:01
  • \$\begingroup\$ That is not how registerd DIMMs are built, unfortunately. Take a look at the PDF I linked. \$\endgroup\$ – alex.forencich Sep 17 '14 at 22:25

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