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So in class we talked about how a D-type edge triggered flip flop is considered a 1bit memory cell. I think this is the same for a D-type latch.

My question is, since a D-type edge triggered master slave flip flop uses 2 D-latches, is it considered a 1bit memory cell or 2bits since it has 2 D-latches? And if it is, if I wanted to theoretically create a 1MB memory module entirely out of master slave flip flops, would I just take 1MB and divide by 2 bits(or however many bits the flip flop has)?

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  • \$\begingroup\$ And multiply by 8. \$\endgroup\$ – venny Sep 21 '14 at 22:14
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Yes, technically, a master-slave flip-flop counts as 2 bits of memory. However, because of the way they're connected, you can't really store (and then retrieve) two independent bits of information in them.

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  • \$\begingroup\$ I respectfully disagree. Although it contains two latches, functionally it is only usable as a one-bit memory cell. \$\endgroup\$ – Eric Smith Jul 21 '17 at 6:31
  • \$\begingroup\$ @EricSmith: Isn't that what I said? \$\endgroup\$ – Dave Tweed Jul 22 '17 at 1:05
  • \$\begingroup\$ I disagree with "technically ... counts as 2 bits of memory". I have never seen a master-slave accounted for as 2 bits of memory. The fact that it contains two latches doesn't IMO make it 2 bits of memory in any sense, technical or otherwise. \$\endgroup\$ – Eric Smith Jul 22 '17 at 1:06
  • \$\begingroup\$ @EricSmith: Do you understand how a master-slave FF goes through four internal states in the course of its operation? The only way this can happen is if it has two binary state variables. So it does have two bits of memory, but you can't store two independent bits of information in them. That's what I meant by "technically". \$\endgroup\$ – Dave Tweed Jul 22 '17 at 2:29
  • \$\begingroup\$ I understand the operation of master-slave flip-flops quite well. Having four internal states doesn't give it the property of storing two bits of memory in any useful sense. I can design a circuit with 137 internal states that serves as zero bits of memory. \$\endgroup\$ – Eric Smith Jul 22 '17 at 3:23
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A cascaded sequence of D-latches which uses N clock phases will require N latches for every N-1 bits. A flip flop uses two D-latches will thus need two latches to store one bit. On the other hand, a sequence of 20 D-latches which were triggered on four different phases in a suitably-rotating rotating pattern would be able to hold 16 bits. I haven't seen such a pattern used very often, but it could relatively easily yield a significant space savings.

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